UPD70F3744GJ-GAE-AX Renesas Electronics America, UPD70F3744GJ-GAE-AX Datasheet - Page 885

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UPD70F3744GJ-GAE-AX

Manufacturer Part Number
UPD70F3744GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3744GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
128
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3744GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JJ3
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
A/D
converter
Function
ADA0S register
ADA0CRn,
ADA0CRnH
registers
ADA0PFM
register
ADA0PFT
register
External trigger
mode
Timer trigger
mode
When A/D
converter is not
used
Details of
Function
When writing data to the ADA0S register in the following modes, stop the A/D
conversion by clearing the AD0M0.ADA0CE bit to 0. After the data is written to
the register, enable the A/D conversion again by setting the ADA0CE bit to 1.
• Normal conversion mode
• One-shot select mode/one-shot scan mode in high-speed conversion mode
Be sure to clear bits 7 to 4 to “0”.
Accessing the ADA0CRn and ADA0CRnH registers is prohibited in the following
statuses. For details, see 3.4.8 (2) Accessing specific on-chip peripheral I/O
registers.
• When the CPU operates with the subclock and the main clock oscillation is
• When the CPU operates with the internal oscillation clock
A write operation to the ADA0M0 and ADA0S registers may cause the contents of
the ADA0CRn register to become undefined. After the conversion, read the
conversion result before writing to the ADA0M0 and ADA0S registers. Correct
conversion results may not be read if a sequence other than the above is used.
In the select mode, the 8-bit data set to the ADA0PFT register is compared with
the value of the ADA0CRnH register specified by the ADA0S register. If the result
matches the condition specified by the ADA0PFC bit, the conversion result is
stored in the ADA0CRn register and the INTAD signal is generated. If it does not
match, however, the interrupt signal is not generated.
In the scan mode, the 8-bit data set to the ADA0PFT register is compared with the
contents of the ADA0CR0H register. If the result matches the condition specified
by the ADA0PFC bit, the conversion result is stored in the ADA0CR0 register and
the INTAD signal is generated. If it does not match, however, the INTAD signal is
not generated. Regardless of the comparison result, the scan operation is
continued and the conversion result is stored in the ADA0CRn register until the
scan operation is completed. However, the INTAD signal is not generated after
the scan operation has been completed.
When writing data to the ADA0PFM register in the following modes, stop the A/D
conversion by clearing the AD0M0.ADA0CE bit to 0. After the data is written to
the register, enable the A/D conversion again by setting the ADA0CE bit to 1.
• Normal conversion mode
• One-shot select mode/one-shot scan mode in high-speed conversion mode
When writing data to the ADA0PFT register in the following modes, stop the A/D
conversion by clearing the AD0M0.ADA0CE bit to 0. After the data is written to
the register, enable the A/D conversion again by setting the ADA0CE bit to 1.
• Normal conversion mode
• One-shot select mode/one-shot scan mode in high-speed conversion mode
To select the external trigger mode, set the high-speed conversion mode. Do not
input a trigger during stabilization time that is inserted once after the A/D
conversion operation is enabled (ADA0M0.ADA0CE bit = 1).
To select the timer trigger mode, set the high-speed conversion mode. Do not
input a trigger during stabilization time that is inserted once after the A/D
conversion operation is enabled (ADA0M0.ADA0CE bit = 1).
When the A/D converter is not used, the power consumption can be reduced by
clearing the ADA0M0.ADA0CE bit to 0.
stopped
Cautions
APPENDIX E LIST OF CAUTIONS
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