UPD70F3744GJ-GAE-AX Renesas Electronics America, UPD70F3744GJ-GAE-AX Datasheet - Page 291

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UPD70F3744GJ-GAE-AX

Manufacturer Part Number
UPD70F3744GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3744GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
128
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3744GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JJ3
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
Remark
Figure 7-33. Software Processing Flow in Free-Running Timer Mode (Capture Function) (2/2)
n = 0 to 8
<1> Count operation start flow
<2> Overflow flag clear flow
<3> Count operation stop flow
(TPnCKS0 to TPnCKS2 bits)
TPnOVF bit (CLR TPnOVF).
Execute instruction to clear
Read TPnOPT0 register
Register initial setting
(check overflow flag).
TPnCTL1 register,
TPnIOC1 register,
TPnOPT0 register
TPnCTL0 register
TPnOVF bit = 1
TPnCE bit = 1
TPnCE bit = 0
START
STOP
YES
CHAPTRER 7 16-bit TIMER/EVENT COUNTER P (TMP)
NO
Counter is initialized and
counting is stopped by
clearing TPnCE bit to 0.
Initial setting of these registers
is performed before setting the
TPnCE bit to 1.
The TPnCKS0 to TPnCKS2 bits can
be set at the same time when counting
has been started (TPnCE bit = 1).
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