UPD70F3744GJ-GAE-AX Renesas Electronics America, UPD70F3744GJ-GAE-AX Datasheet - Page 734

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UPD70F3744GJ-GAE-AX

Manufacturer Part Number
UPD70F3744GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet

Specifications of UPD70F3744GJ-GAE-AX

Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
128
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3744GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JJ3
22.3.4 Operation after reset release
2
clock.
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
16
/f
After the reset is released, the main clock starts oscillation and oscillation stabilization time (OSTS register initial value:
WDT2 immediately begins to operate after a reset has been released using the internal oscillation clock as a source
(1) Emergent operation mode
Internal oscillation
Internal oscillation
X
) is secured, and the CPU starts program execution.
Clock monitor
Clock monitor
If an anomaly occurs in the main clock before oscillation stabilization time is secured, WDT2 overflows before
executing the CPU program. At this time, the CPU starts program execution by using the internal oscillation clock
as the source clock.
The CPU operation clock states can be checked with the CPU operation clock status register (CCLS).
V850ES/JJ3
V850ES/JJ3
Main clock
Main clock
WDT2
WDT2
clock
clock
Operation
Operation
Reset
Reset
stops
stops
Figure 22-5. Operation After Reset Release
Figure 22-6. Operation After Reset Release
Counting of oscillation stabilization time
Counting of oscillation stabilization time
Operation stops
Operation in progress
Operation in progress
Operation stops
CHAPTER 22 RESET FUNCTIONS
WDT overflows
Normal operation (f
Operation in progress (re-count)
(f
CPU
Operation in progress
= internal oscillation clock)
Emergency mode
CPU
Page 718 of 892
= Main clock)

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