SAB-C161O-LM 3V HA Infineon Technologies, SAB-C161O-LM 3V HA Datasheet - Page 48

• Manufacturer Part Number: SAB-C161O-LM 3V HA
• Description: IC MICROCONTROLLER 16BIT MQFP80
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAB-C161O-LM 3V HA

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-SQFP
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: 1xASC, 1xSSC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 63
• Number Of Timers: 5
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Packages: PG-MQFP-80
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 2.0 KByte
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: B161OLM3VHAXT; SABC161OLM3VHAXT; SP000011588

AC Characteristics
Multiplexed Bus (Reduced Supply Voltage Range)
(Operating Conditions apply)
ALE cycle time = 6 TCL + 2
Parameter
ALE high time
Address setup to ALE
Address hold after ALE
ALE falling edge to RD,
WR (with RW-delay)
ALE falling edge to RD,
WR (no RW-delay)
Address float after RD,
WR (with RW-delay)
Address float after RD,
WR (no RW-delay)
RD, WR low time
(with RW-delay)
RD, WR low time
RD to valid data in
RD to valid data in
ALE low to valid data in
Address to valid data in
Data hold after RD
rising edge
Data Sheet
(no RW-delay)
(with RW-delay)
(no RW-delay)
t
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
A
5
6
7
8
9
10
11
12
13
14
15
16
17
18
+
t
CC 11 +
CC 5 +
CC 15 +
CC 15 +
CC -10 +
CC –
CC –
CC 34 +
CC 59 +
SR –
SR –
SR –
SR –
SR 0
C
+
t
F
min.
Max. CPU Clock
(150 ns at 20 MHz CPU clock without waitstates)
t
= 20 MHz
A
t
t
t
t
t
44
A
A
A
t
C
C
A
max.
–
–
–
–
–
6
31
–
–
22 +
47 +
45 +
+
57 + 2
+
–
t
t
C
C
t
t
t
C
C
A
t
A
1 / 2TCL = 1 to 20 MHz
min.
TCL - 14
+
TCL - 20
+
TCL - 10
+
TCL - 10
+
-10 +
–
–
2TCL - 16
+
3TCL - 16
+
–
–
–
–
0
Variable CPU Clock
t
t
t
t
t
t
C
A
A
A
A
C
t
A
max.
–
–
–
–
–
6
TCL + 6
–
–
2TCL - 28
+
3TCL - 28
+
3TCL - 30
+
4TCL - 43
+ 2
–
t
t
t
C
C
A
t
A
+
V2.0, 2001-01
+
t
C
t
C
C161O
C161K
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns