UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 199

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UPD70F3737GF-GAS-AX

Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3737GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
5.6
5.6.1
(1) Data wait control register 0 (DWC0)
Wait Function
To realize interfacing with a low-speed memory or I/O device, up to seven data wait states can be inserted in
the bus cycle that is executed for each memory block space.
The number of wait states can be programmed by using the DWC0 register. Immediately after system reset, 7
data wait states are inserted for all the memory block areas.
The DWC0 register can be read or written in 16-bit units.
Reset sets this register to 7777H.
Cautions 1. The internal ROM and internal RAM areas are not subject to programmable wait, and are
Programmable wait function
DWC0
After reset: 7777H
Memory block n signal
Memory block n signal
2. Write to the DWC0 register after reset, and then do not change the set values. Also, when
always accessed without a wait state. The on-chip peripheral I/O area is also not subject
to programmable wait, and only wait control from each peripheral function is performed.
changing the initial values of the DWC0 register, do not access an external memory area
until the settings are complete.
Caution Be sure to clear bits 15, 11, 7, and 3 to “0”.
DWn2
15
0
7
0
0
0
0
0
1
1
1
1
DWn1
DW32
DW12
14
0
0
1
1
0
0
1
1
6
R/W
CHAPTER 5 BUS CONTROL FUNCTION
Memory block 3
Memory block 1
DW31
DW11
DWn0
User’s Manual U18953EJ5V0UD
Address: FFFFF484H
13
5
0
1
0
1
0
1
0
1
Number of wait states inserted in memory block n space (n = 0 to 3)
None
1
2
3
4
5
6
7
DW30
DW10
12
4
11
0
0
3
DW22
DW02
10
2
Memory block 0
Memory block 2
DW21
DW01
1
9
DW20
DW00
0
8
197

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