UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 221
UPD70F3737GF-GAS-AX
Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3737GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(b) Example of changing subclock operation to main clock operation
<1> MCK bit ← 0:
<2> Insert waits by program and wait until the oscillation stabilization time of the main clock has elapsed.
<3> CK3 bit ← 0:
<4> Main clock operation:
Caution Enable operation of the on-chip peripheral functions operating on the main clock only
[Description example]
<1> _START_MAIN_OSC :
<2> movea
<3> st.b
<4> nop
_DMA_DISABLE:
clrl
st.b
clr1
_WAIT_OST :
nop
nop
nop
addi
bnz
clr1
_DMA_ENABLE:
setl
after the oscillation of the main clock stabilizes. If their operations are enabled before
the lapse of the oscillation stabilization time, a malfunction may occur.
0, DCHCn[r0]
r0, PRCMD[r0]
6, PCC[r0]
0x55, r0, r11
-1, r11, r11
_WAIT_OST
r0, PRCMD[r0]
3, PCC[r0]
0, DCHCn[r0]
CHAPTER 6 CLOCK GENERATOR
Use of a bit manipulation instruction is recommended. Do not change the
Main clock starts oscillating
CK2 to CK0 bits.
It takes the following time after the CK3 bit is set until main clock operation
is started.
Therefore, insert one NOP instruction immediately after setting the CK3 bit
to 0.
Max.: 1/f
User’s Manual U18953EJ5V0UD
XT
(1/subclock frequency)
-- DMA operation disabled. n = 0 to 3
-- Release of protection of special registers
-- Main clock starts oscillating.
-- Wait for oscillation stabilization time.
-- CK3 ← 0
-- DMA operation enabled. n = 0 to 3
219
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