UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 626
UPD70F3737GF-GAS-AX
Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3737GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(6) Data frame length during continuous transmission
In continuous transmission, the data frame length from the stop bit to the next start bit is 2 base clock cycles
longer than usual. However, timing initialization is performed via start bit detection by the receiving side, so
this has no influence on the transfer result.
Assuming a 1 bit data length of BL; a stop bit length of BLstp; and a base clock frequency of f
the following equation.
Therefore, the transfer rate during continuous transmission is as follows.
BLstp = BL + 2/f
Data frame length = 11 × BL + (2/f
Start bit
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC) (
BL
Figure 17-17. Data Frame Length During Continuous Transmission
Bit 0
UCLK
BL
Bit 1
BL
1 data frame (FL)
UCLK
User’s Manual U18953EJ5V0UD
)
Bit 7
BL
Parity bit
BL
Stop bit
BLstp
PD70F3792, 70F3793)
Start bit
BL
Start bit of 2nd byte
Bit 0
BL
UCLK
, we obtain
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