UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 84

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UPD78F9234MC-5A4-A

Manufacturer Part Number
UPD78F9234MC-5A4-A
Description
MCU 8BIT 8KB FLASH 30PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9234MC-5A4-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer
Quantity
Price
Part Number:
UPD78F9234MC-5A4-A
Manufacturer:
MAXIM
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Part Number:
UPD78F9234MC-5A4-A
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(2) Crystal/ceramic oscillator
82
Remark PCC:
(a) The internal reset signal is generated by the power-on-clear function on power application, the option byte is
(b) The option byte is referenced and the system clock is selected. Then the high-speed internal oscillation
If crystal/ceramic oscillation is selected by the option byte, a clock frequency of 2 to 10 MHz can be selected and
the accuracy of processing is improved because the frequency deviation is small, as compared with high-speed
internal oscillation (8 MHz (TYP.)).
Figures 5-10 and 5-11 show the timing chart and status transition diagram of default start by the crystal/ceramic
oscillator.
referenced after reset, and the system clock is selected.
clock operates as the system clock.
PPCC: Preprocessor clock control register
Figure 5-9. Status Transition of Default Start by High-Speed internal oscillation
Processor clock control register
Interrupt
HALT
CHAPTER 5 CLOCK GENERATORS
instruction
High-speed internal
Clock division ratio
oscillator selected
HALT
power-on-clear
variable during
CPU operation
by option byte
User’s Manual U17446EJ5V0UD
Reset by
application
Power
instruction
V
Start with PCC = 02H,
PPCC = 02H
STOP
DD
> 2.1 V (TYP.)
STOP
Interrupt
Reset signal

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