UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 127

• Manufacturer Part Number: UPD78F9234MC-5A4-A
• Description: MCU 8BIT 8KB FLASH 30PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9234MC-5A4-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(14) Conflicting operations
(15) Capture operation
If the register read period and the input of the capture trigger conflict when CR000/CR010 is used as a capture
register, the capture trigger input takes precedence and the read data is undefined. Also, if the count stop of
the timer and the input of the capture trigger conflict, the captured data is undefined.
<1> If the valid edge of the TI000 pin is to be set as the count clock, do not set the clear/start mode and the
<2> If both the rising and falling edges are selected as the valid edges of the TI000 pin, capture is not
<3> When the CRC001 bit value is 1, the TM00 count value is not captured in the CR000 register when a
<4> To ensure the reliability of the capture operation, the capture trigger requires a pulse longer than two
<5> The capture operation is performed at the fall of the count clock. An interrupt request input (INTTM0n0),
<6> To use two capture registers, set the TI000 and TI010 pins.
Remark n = 0, 1
capture trigger at the valid edge of the TI000 pin.
performed.
valid edge of the TI010 pin is detected, but the input from the TI010 pin can be used as an external
interrupt source because INTTM000 is generated at that timing.
cycles of the count clock selected by prescaler mode register 00 (PRM00).
however, occurs at the rise of the next count clock.
CR010 capture value
Capture read signal
TM00 count value
Count clock
Edge input
INTTM010
Figure 6-38. Capture Register Data Retention Timing
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
N
User’s Manual U17446EJ5V0UD
X
N + 1
Capture
N + 2
N + 2
M
Capture, but
read value is
not guaranteed
M + 1
M + 1
M + 2
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