UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 252

• Manufacturer Part Number: UPD78F9234MC-5A4-A
• Description: MCU 8BIT 8KB FLASH 30PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9234MC-5A4-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

250
High-speed internal oscillation clock or
Internal reset signal
Notes 1.
Remark When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
Notes 1.
Remarks 1. f
Crystal/ceramic
oscillation clock
(except P130)
2.
2.
Port pin
Port pin
RESET
(P130)
effected, the output signal of P130 can be dummy-output as the reset signal to the CPU.
2. When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
Internal reset signal
The operation stop time is 277 s (MIN.), 544 s (TYP.), and 1.075 ms (MAX.).
Set high level output using software.
The operation stop time is 276 s (MIN.), 544 s (TYP.), and 1.074 ms (MAX.).
Set high level output using software.
external clock input
effected, the output signal of P130 can be dummy-output as the reset signal to the CPU.
X
: System clock oscillation frequency
(except P130)
<1> With high-speed internal oscillation clock or external clock input
CPU clock
Normal operation
Port pin
Port pin
RESET
(P130)
in progress
Figure 15-2. Timing of Reset by RESET Input
Normal operation
<2> With crystal/ceramic oscillation clock
in progress
CHAPTER 15 RESET FUNCTION
100 ns (TYP.)
Delay
User’s Manual U17446EJ5V0UD
100 ns (TYP.)
(oscillation stops)
Delay
Reset period
100 ns (TYP.)
(oscillation stops)
Delay
Reset period
100 ns (TYP.)
Delay
Oscillation stabilization
time (2
Operation stops because option
byte is referenced
10
/f
X
to 2
Hi-Z
Operation stops because option
byte is referenced
17
/f
Normal operation (reset processing, CPU clock)
X
)
Hi-Z
Normal operation
(reset processing, CPU clock)
Note 1
.
Note 1
.
Note 2
Note 2