UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 181

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UPD78F9234MC-5A4-A

Manufacturer Part Number
UPD78F9234MC-5A4-A
Description
MCU 8BIT 8KB FLASH 30PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9234MC-5A4-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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10.6 Cautions for A/D Converter
(1) Operating current in STOP mode
(2) Input range of ANI0 to ANI3
(3) Conflicting operations
(4) Noise countermeasures
To satisfy the DC characteristics of the supply current in the STOP mode, clear bit 7 (ADCS) and bit 0 (ADCE) of
the A/D converter mode register (ADM) to 0 before executing the STOP instruction.
Observe the rated range of the ANI0 to ANI3 input voltage. If a voltage of AV
(even in the range of absolute maximum ratings) is input to an analog input channel, the converted value of that
channel becomes undefined. In addition, the converted values of the other channels may also be affected.
<1> Conflict between A/D conversion result register (ADCR, ADCRH) write and ADCR, ADCRH read by
<2> Conflict between ADCR, ADCRH write and A/D converter mode register (ADM) write or analog input
To maintain the 10-bit resolution, attention must be paid to noise input to the AV
<1> Connect a capacitor with a low equivalent resistance and a high frequency response to the power supply.
<2> Because the effect increases in proportion to the output impedance of the analog input source, it is
<3> Do not switch the A/D conversion function of the ANI0 to ANI3 pins to their alternate functions during
<4> The conversion accuracy can be improved by setting HALT mode immediately after the conversion starts.
recommended that a capacitor be connected externally, as shown in Figure 10-19, to reduce noise.
conversion.
Reference
instruction upon the end of conversion
ADCR, ADCRH read has priority. After the read operation, the new conversion result is written to ADCR,
ADCRH.
channel specification register (ADS) write upon the end of conversion
ADM or ADS write has priority. ADCR, ADCRH write is not performed, nor is the conversion end interrupt
signal (INTAD) generated.
C = 0.01 to 0.1 F
voltage
input
Figure 10-19. Analog Input Pin Connection
CHAPTER 10 A/D CONVERTER
User’s Manual U17446EJ5V0UD
AV
V
AV
ANI0 to ANI3
SS
SS
REF
If there is a possibility that noise equal to or higher than AV
equal to or lower than AV
small V
F
value (0.3 V or lower).
SS
may enter, clamp with a diode with a
REF
REF
or higher and AV
pin and pins ANI0 to ANI3.
REF
or
SS
or lower
179

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