UPD78F9234MC-5A4-A Renesas Electronics America, UPD78F9234MC-5A4-A Datasheet - Page 400

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UPD78F9234MC-5A4-A

Manufacturer Part Number
UPD78F9234MC-5A4-A
Description
MCU 8BIT 8KB FLASH 30PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9234MC-5A4-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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A/D
converter
Function
PMC2: Port
mode control
register 2
A/D converter
operations
Operating current
in STOP mode
Input range of
ANI0 to ANI3
Conflicting
operations
Noise
countermeasures
ANI0/P20 to
ANI3/P23
Details of
Function
When PMC20 to PMC23 are set to 1, the P20/ANI0 to P23/ANI3 pins cannot
be used as port pins. Be sure to set the pull-up resistor option registers (PU20
to PU23) to 0 for the pins set to A/D converter mode.
Make sure the period of <1> to <4> is 1
It is no problem if the order of <1> and <2> is reversed.
<1> can be omitted. However, ignore the data resulting from the first
conversion after <4> in this case.
The period from <5> to <8> differs from the conversion time set using bits 5 to
3 (FR2 to FR0) of ADM. The period from <7> to <8> is the conversion time
set using FR2 to FR0.
To satisfy the DC characteristics of the supply current in the STOP mode,
clear bit 7 (ADCS) and bit 0 (ADCE) of the A/D converter mode register (ADM)
to 0 before executing the STOP instruction.
Observe the rated range of the ANI0 to ANI3 input voltage. If a voltage of
AV
ratings) is input to an analog input channel, the converted value of that
channel becomes undefined. In addition, the converted values of the other
channels may also be affected.
ADCR, ADCRH read has priority. After the read operation, the new
conversion result is written to ADCR, ADCRH.
ADM or ADS write has priority. ADCR, ADCRH write is not performed, nor is
the conversion end interrupt signal (INTAD) generated.
To maintain the 10-bit resolution, attention must be paid to noise input to the
AV
<1> Connect a capacitor with a low equivalent resistance and a high
<2> Because the effect increases in proportion to the output impedance of the
<3> Do not switch the A/D conversion function of the ANI0 to ANI3 pins to
<4> The conversion accuracy can be improved by setting HALT mode
The analog input pins (ANI0 to ANI3) are also used as input port pins (P20 to
P23).
When A/D conversion is performed with any of ANI0 to ANI3 selected, do not
access port 2 (P20 to P23) while conversion is in progress; otherwise the
conversion resolution may be degraded.
If a digital pulse is applied to the pins adjacent to the pins currently used for
A/D conversion, the expected value of the A/D conversion may not be
obtained due to coupling noise. Therefore, do not apply a pulse to the pins
adjacent to the pin undergoing A/D conversion.
REF
REF
APPENDIX D LIST OF CAUTIONS
immediately after the conversion starts.
analog input source, it is recommended that a capacitor be connected
externally, as shown in Figure 10-19, to reduce noise.
their alternate functions during conversion.
frequency response to the power supply.
or higher and AV
pin and pins ANI0 to ANI3.
User’s Manual U17446EJ5V0UD
SS
or lower (even in the range of absolute maximum
Cautions
μ
s or more.
p.171
pp.
172, 176
pp.
172, 176
p.176
p.176
p.179
p.179
p.179
p.179
p.179
p.180
p.180
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