D64F3437TFLH16V Renesas Electronics America, D64F3437TFLH16V Datasheet - Page 176
![MCU 5V 60K PB-FREE 100-TQFP](/photos/28/61/286108/100-tqfp_sml.jpg)
D64F3437TFLH16V
Manufacturer Part Number
D64F3437TFLH16V
Description
MCU 5V 60K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheet
1.HD64F3437STF16V.pdf
(755 pages)
Specifications of D64F3437TFLH16V
Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D64F3437TFLH16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 176 of 755
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7.10.3
Port 9 has one set of pin functions in modes 1 and 2, and a different set of pin functions in mode 3.
The pins are multiplexed with IRQ
input, system clock (ø) output, host interface input (ECS
(SDA). Table 7.19 indicates the pin functions of port 9.
Table 7.19 Port 9 Pin Functions
P9
P9
P9
P9
144
7
6
5
4
/WAIT/SDA
/ø
/AS
/WR
Pin Functions
Bit ICE in ICCR, bit P9
operating mode select the pin function as follows
Operating mode
Wait mode
ICE
P9
Pin function
Bit P9
Operating mode
P9
Pin function
Bit P9
Operating mode
P9
Pin function
Bit P9
Operating mode
P9
Pin function
7
6
5
4
DDR
DDR
DDR
DDR
6
5
4
DDR and the operating mode select the pin function as follows
DDR and the operating mode select the pin function as follows
DDR and the operating mode select the pin function as follows
0
to IRQ
Modes 1 and 2
WAIT
WAIT
used
input
Modes 1 and 2
Modes 1 and 2
—
—
7
DDR, the wait mode as determined by WSCR, and the
WR output
AS output
Always 1
ø output
2
input, bus control signal input/output, A/D converter
—
—
Modes 1 and 2
input
P9
0
7
0
not used
output
WAIT
2
P9
, EIOW), and I
1
7
P9
P9
P9
output
input/
SDA
6
5
4
—
1
0
0
0
input
input
input
2
C data input/output
input
Mode 3
Mode 3
Mode 3
P9
0
7
0
Mode 3
output
P9
P9
P9
—
ø output
1
5
4
7
output
output
1
1
1
output
input/
SDA
—
1
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