HD6473308RCP10V Renesas Electronics America, HD6473308RCP10V Datasheet - Page 90
HD6473308RCP10V
Manufacturer Part Number
HD6473308RCP10V
Description
MCU 5V 16K,PB-FREE 80-PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/330r
Datasheet
1.HD6473258P10V.pdf
(349 pages)
Specifications of HD6473308RCP10V
Core Size
8-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
H8/300
Speed
10MHz
Number Of I /o
58
Program Memory Type
OTP
Ram Size
512 x 8
Operating Temperature
-20°C ~ 75°C
Package / Case
80-PLCC
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
10MHz
No. Of Timers
3
No. Of Pwm Channels
2
Digital Ic Case
RoHS Compliant
Controller Family/series
H8/330
Peripherals
ADC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply (vcc/vdd)
-
Eeprom Size
-
Data Converters
-
Peripherals
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6473308RCP10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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4.2.6 Deferring of Interrupts
As noted previously, no interrupt is accepted immediately after a reset. System control instructions
that rewrite the CCR have a similar effect. Interrupts requests received during one of these
instructions are deferred until at least one more instruction has been executed.
The instructions that defer interrupts in this way are XORC, ORC, ANDC, and LDC. At the
completion of these instructions the interrupt controller does not check the interrupt signals. The
CPU therefore always proceeds to the next instruction. (And if the next instruction is one of these
four, the CPU also proceeds to the next instruction after that.) The interrupt-handling sequence
starts after the next instruction that is not one of these four has been executed. Figure 4-8 shows an
example.
SP
H'FFCF set in SP
PC :
PC :
SP :
R1 :
Figure 4-7. Example of Damage Caused by Setting an Odd Address in R7
H
L
L
Lower byte of program counter
Stack pointer
Upper byte of program counter
General register
BSR instruction
SP
PC is improperly stored
beyond top of stack
PC
PC
75
H
L
MOV.B R1L, @–R7
SP
PC is lost
PC
R1
H
L
L
H'FFCC
H'FFCD
H'FFCF
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