HD6473308RCP10V Renesas Electronics America, HD6473308RCP10V Datasheet - Page 306
HD6473308RCP10V
Manufacturer Part Number
HD6473308RCP10V
Description
MCU 5V 16K,PB-FREE 80-PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/330r
Datasheet
1.HD6473258P10V.pdf
(349 pages)
Specifications of HD6473308RCP10V
Core Size
8-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
H8/300
Speed
10MHz
Number Of I /o
58
Program Memory Type
OTP
Ram Size
512 x 8
Operating Temperature
-20°C ~ 75°C
Package / Case
80-PLCC
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
10MHz
No. Of Timers
3
No. Of Pwm Channels
2
Digital Ic Case
RoHS Compliant
Controller Family/series
H8/330
Peripherals
ADC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply (vcc/vdd)
-
Eeprom Size
-
Data Converters
-
Peripherals
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6473308RCP10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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A.3 Number of States Required for Execution
The tables below can be used to calculate the number of states required for instruction execution.
Table A-3 indicates the number of states required for each cycle (instruction fetch, branch address
read, stack operation, byte data access, word data access, internal operation). Table A-4 indicates
the number of cycles of each type occurring in each instruction. The total number of states required
for execution of an instruction can be calculated from these two tables as follows:
Execution states = I S
Examples: Mode 1 (on-chip ROM disabled), stack located in external memory, 1 wait state
inserted in external memory access.
1. BSET #0, @FFC7
2. JSR @@30
Table A-3. Number of States Taken by Each Cycle in Instruction Execution
Execution Status
(instruction cycle)
Instruction fetch
Branch address read S
Stack operation
Byte data access
Word data access
Internal operation
Notes: 1. m: Number of wait states inserted in access to external device.
From table A-4: I = L = 2,
From table A-3: S
Number of states required for execution: 2 8 + 2 3 =22
From table A-4: I = 2,
From table A-3: S
Number of states required for execution: 2 8 + 1 8 + 1 8 = 32
2. The byte data access cycle to an external device by the MOVFPE and MOVTPE
instructions requires 9 to 16 states since it is synchronized with the E clock. See
section 15, "E-Clock Interface" for timing details.
S
S
S
S
S
I
I
I
J
K
L
M
N
I
= 8,
= S
+ J S
J
= S
J = K = 1,
S
J
K
2
On-Chip Memory On-Chip Reg. Field External Memory
L
+ K S
J = K = M = N= 0
= 3
= 8
K
L = M = N = 0
+ L S
298
L
Access Location
+ M S
6
3
6
2
M
+ N S
N
6 + 2m
3 + m
6 + 2m
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