HD6473308RCP10V Renesas Electronics America, HD6473308RCP10V Datasheet - Page 158

• Manufacturer Part Number: HD6473308RCP10V
• Description: MCU 5V 16K,PB-FREE 80-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/330r

Specifications of HD6473308RCP10V

• Core Size: 8-Bit
• Program Memory Size: 16KB (16K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 10MHz
• Number Of I /o: 58
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-PLCC
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 10MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 2
• Digital Ic Case: RoHS Compliant
• Controller Family/series: H8/330
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply (vcc/vdd): -
• Eeprom Size: -
• Data Converters: -
• Peripherals: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

If the upper byte of ICRx is being read when the input capture signal arrives, the internal input
capture signal is delayed by one state. Figure 6-13 shows the timing for this case.
In buffer mode, this delay occurs if the CPU is reading either of the two registers concerned. When
ICRA and ICRC are used in buffer mode, for example, if the upper byte of either ICRA or ICRC is
being read when the FTIA input arrives, the internal input capture signal is delayed by one state.
Figure 6-14 shows the timing for this case. The case of ICRB and ICRD is similar.
Ø
Input at FTI pin
Internal input
capture signal
Ø
Input at
FTIA pin
Internal input
capture signal
Ø
Input at FTI pin
Internal input
capture signal
Figure 6-14. Input Capture Timing (1-State Delay, Buffer Mode)
Read cycle: CPU reads upper byte of ICRA or ICRC
Figure 6-13. Input Capture Timing (1-State Delay)
T
Figure 6-12. Input Capture Timing (Usual Case)
1
T
2
T
3
143
Read cycle: CPU reads upper byte of ICR
T
1
T
2
T
Figure 6-14
3
Figure 6-13