R4F24569NVFQV Renesas Electronics America, R4F24569NVFQV Datasheet - Page 1214

• Manufacturer Part Number: R4F24569NVFQV
• Description: MCU 256KB FLASH 64K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24569NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 22 Flash Memory
The calculated operating frequency should be checked to ensure that it is within the range of
minimum to maximum frequencies which are available with the clock modes of the specified
device. When it is out of this range, an operating frequency error is generated.
4. Bit rate
To facilitate error checking, the value (n) of clock select (CKS) in the serial mode register (SMR),
and the value (N) in the bit rate register (BRR), which are found from the peripheral operating
clock frequency (φ) and bit rate (B), are used to calculate the error rate to ensure that it is less than
4%. If the error is 4% or more, a bit rate error is generated. The error is calculated using the
following expression:
When the new bit rate is selectable, the rate will be set in the register after sending ACK in
response. The host will send an ACK with the new bit rate for confirmation and the boot program
will response with that rate.
• Confirmation, H'06, (1 byte): Confirmation of a new bit rate
• Response, H'06, (1 byte): Response to confirmation of a new bit rate
The sequence of new bit-rate selection is shown in figure 22.13.
Page 1184 of 1392
Confirmation
Response
Waiting for one-bit period
Setting a new bit rate
at the specified bit rate
H'06
Host
H'06
Error (%) = {[
Figure 22.13 New Bit-Rate Selection Sequence
H'06 (ACK) with the new bit rate
H'06 (ACK) with the new bit rate
(N + 1) × B × 64 × 2
Setting a new bit rate
H'06 (ACK)
φ × 10
6
(2×n − 1)
] − 1} × 100
H8S/2456, H8S/2456R, H8S/2454 Group
Setting a new bit rate
Boot program
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010