D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 866

MCU 3V 0K 144-QFP

D12332VFC25

Manufacturer Part Number
D12332VFC25
Description
MCU 3V 0K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of D12332VFC25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412332VFC25
HD6412332VFC25

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12332VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
19.20.5 Auto-Program Mode
• In auto-program mode, 128 bytes are programmed simultaneously. For this purpose, 128
• A 128-byte data transfer must be performed even if writing fewer than 128 bytes; in this case,
• The lower 7 bits of the transfer address must be held low. If an invalid address is input,
• Memory address transfer is executed in the second cycle (figure 19.52). Do not perform
• Do not perform a command write during a programming operation.
• Perform one auto-programming operation for a 128-byte block for each address. One or more
• Confirm normal end of auto-programming by checking I/O
• Status polling I/O
Rev.4.00 Sep. 07, 2007 Page 834 of 1210
REJ09B0245-0400
consecutive byte data transfers should be performed.
H'FF data must be written to the extra addresses.
memory programming will be started but a programming error will occur.
transfer later than the second cycle.
additional programming operations cannot be carried out on address blocks that have already
been programmed.
can also be used for this purpose (the I/O
auto-program operation).
the next command write has not been performed, reading is possible by enabling CE and OE.
6
and I/O
7
information is retained until the next command write. As long as
7
status polling pin is used to identify the end of an
6
. Alternatively, status read mode

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