D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 52

• Manufacturer Part Number: D12332VFC25
• Description: MCU 3V 0K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412332VFC25; HD6412332VFC25

Rev.4.00 Sep. 07, 2007 Page 20 of 1210
REJ09B0245-0400
Type
Interrupts
Address bus
Data bus
Bus control
Symbol
NMI
IRQ
IRQ
A
A
D
D
CS
CS
AS
RD
HWR
LWR
CAS
LCAS
23
0
15
0
7
0
to
to
7
0
to
to
89
Pin No.
FP-144G I/O
32 to 34,
40 to 42,
37, 38
108 to 105
31 to 28,
26 to 19,
17 to 10,
8 to 5
60 to 57,
55 to 48,
46 to 43
35, 36,
61, 60,
141 to 144
98
99
100
101
140
102
Input
Input
Output Address bus: These pins output an address.
I/O
Output Chip select: Signals for selecting areas 7 to 0.
Output Address strobe: When this pin is low, it
Output Read: When this pin is low, it indicates that the
Output High write/write enable: A strobe signal that
Output Low write: A strobe signal that writes to
Output Upper column address strobe/column
Output Lower column address strobe: The 2-CAS
Name and Function
Nonmaskable interrupt: Requests a
nonmaskable interrupt. When this pin is not
used, it should be fixed high.
Interrupt request 7 to 0: These pins request a
maskable interrupt.
Data bus: These pins constitute a bidirectional
data bus.
indicates that address output on the address bus
is enabled.
external address space can be read.
writes to external space and indicates that the
upper half (D
The 2-CAS type DRAM write enable signal.
external space and indicates that the lower half
(D
address strobe: The 2-CAS type DRAM upper
column address strobe signal.
type DRAM lower column address strobe signal.
7
to D
0
) of the data bus is enabled.
15
to D
8
) of the data bus is enabled.