DF36054GFPJV Renesas Electronics America, DF36054GFPJV Datasheet - Page 80

• Manufacturer Part Number: DF36054GFPJV
• Description: MCU 3/5V 32K J-TEMP PB-FREE 64-L
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36054GFPJV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 2 CPU
1. When the BCLR instruction is executed, first the CPU reads PCR5. Since PCR5 is a write-only
2. Next, the CPU clears bit 0 in the read data to 0, changing the data to H'FE.
3. Finally, H'FE is written to PCR5 and BCLR instruction execution ends.
As a result of this operation, bit 0 in PCR5 becomes 0, making P50 an input port. However, bits 7
and 6 in PCR5 change to 1, so that P57 and P56 change from input pins to output pins. To prevent
this problem, store a copy of the PDR5 data in a work area in memory and manipulate data of the
bit in the work area, then write this data to PDR5.
Rev. 4.00 Mar. 15, 2006 Page 46 of 556
REJ09B0026-0400
Input/output
Pin state
PCR5
PDR5
Input/output
Pin state
PCR5
PDR5
RAM0
BCLR
MOV.B
MOV.B
MOV.B
BCLR instruction executed
After executing BCLR instruction
Description on operation
register, the CPU reads a value of H'FF, even though the PCR5 value is actually H'3F.
Prior to executing BCLR instruction
#0,
#3F,
R0L,
R0L,
P57
Output
Low
level
1
1
P57
Input
Low
level
0
1
0
@PCR5
R0L
@RAM0
@PCR5
P56
Output
High
level
1
0
P56
Input
High
level
0
0
0
P55
Output
Low
level
1
0
P55
Output
Low
level
1
0
1
The BCLR instruction is executed for PCR5.
The PCR5 value (H'3F) is written to a work area in
memory (RAM0) as well as to PCR5.
P54
Output
Low
level
1
0
P54
Output
Low
level
1
0
1
P53
Output
Low
level
1
0
P53
Output
Low
level
1
0
1
P52
Output
Low
level
1
0
P52
Output
Low
level
1
0
1
P51
Output
0
P51
Output
1
0
1
Low
level
1
Low
level
P50
Input
High
level
0
0
P50
Output
Low
level
1
0
1