DF36054GFPJV Renesas Electronics America, DF36054GFPJV Datasheet - Page 241

MCU 3/5V 32K J-TEMP PB-FREE 64-L

DF36054GFPJV

Manufacturer Part Number
DF36054GFPJV
Description
MCU 3/5V 32K J-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36054GFPJV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Set reset synchronous PWM mode
<Reset synchronous PWM mode>
Figure 12.26 Example of Reset Synchronous PWM Mode Setting Procedure
Reset synchronous PWM mode
Select counter clearing source
Enable waveform output
Start counter operation
Stop counter operation
Initialize the output pin
Select counter clock
Set TCNT
Set GR
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[1] Clear bit STR0 in TSTR to 0 and stop the
[2] Select the counter clock with bits TPSC2
[3] Use bits CCLR1 and CCLR0 in TCR to
[4] Select the reset synchronous PWM mode
[5] Set H'00 to TOCR.
[6] Set TCNT_0 as H'0000. TCNT1 does not
[7] GRA_0 is a cycle register. Set a cycle for
[8] Enable or disable the timer output by
[9] Set the STR bit in TSTR to 1 and start the
counter operation of TCNT_0. Set reset
synchronous PWM mode after TCNT_0
stops.
to TOSC0 in TCR. When an external
clock is selected, select the external clock
edge with bits CKEG1 and CKEG0 in
TCR.
select counter clearing source GRA_0.
with bits CMD1 and CMD0 in TFCR.
FTIOB0 to FTIOD0 and FTIOA1 to
FTIOD1 become PWM output pins
automatically.
need to be set.
GRA_0. Set the changing point timing of
the PWM output waveform for GRB_0,
GRA_1, and GRB_1.
TOER.
counter operation.
Rev. 4.00 Mar. 15, 2006 Page 207 of 556
Section 12 Timer Z
REJ09B0026-0400

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