DF36054GFPJV Renesas Electronics America, DF36054GFPJV Datasheet - Page 390

• Manufacturer Part Number: DF36054GFPJV
• Description: MCU 3/5V 32K J-TEMP PB-FREE 64-L
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36054GFPJV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 16 Synchronous Serial Communication Unit (SSU)
16.3.5
SSSR is a register that sets interrupt flags.
Rev. 4.00 Mar. 15, 2006 Page 356 of 556
REJ09B0026-0400
Bit
1
0
Bit
7
6
5, 4
Bit Name
RIE
CEIE
Bit Name
—
ORER
SS Status Register (SSSR)
Initial
Value
0
0
Initial
Value
0
0
All 0
R/W
R/W
R/W
R/W
—
R/W
Description
Receive Interrupt Enable
When this bit is set to 1, an RXI and an OEI interrupt
requests are enabled.
Conflict Error Interrupt Enable
When this bit is set to 1, a CEI interrupt request is
enabled.
Description
Reserved
This bit is always read as 0.
Overrun Error Flag
Indicates that the RDRF bit is abnormally terminated in
reception because an overrun error has occurred.
SSRDR retains received data before the overrun error
occurs and the received data after the overrun error
occurs is lost. When this bit is set to 1, subsequent serial
reception cannot be continued. When the MSS bit in
SSCRH is 1, this is also applied to serial transmission.
[Setting condition]
[Clearing condition]
Reserved
These bits are always read as 0.
When the next serial reception is completed while
RDRF = 1
When 0 is written to this bit after reading 1