MC68HC16Z1MAG16 Freescale Semiconductor, MC68HC16Z1MAG16 Datasheet - Page 487
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MC68HC16Z1MAG16
Manufacturer Part Number
MC68HC16Z1MAG16
Description
IC MPU 16BIT 16MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet
1.MC68HC16Z1VEH16.pdf
(500 pages)
Specifications of MC68HC16Z1MAG16
Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Processor Series
HC16Z
Core
CPU16
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SCI, QSPI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC16Z1MAG16
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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EXTRST (external reset)
F1A/B
F1x bits
Factory test
Fast
FC
FE 9-28, 10-21, D-44,
Ferrite beads
f
FOC 11-14,
Force
FPWMx
Frame 9-25,
Framing error (FE) flag 9-28, 10-21, D-44,
Free-running counter (TCNT)
FREEZE
f
Frequency control bits
FRZ 8-4, 11-3, D-30, D-39,
FRZBM 5-3,
FRZSW 5-3,
f
F-term encoding
Function code (FC) signals 5-32,
f
M68HC16 Z SERIES
USER’S MANUAL
limp
ref
sys
VCO
5-5,
5-32
5-5,
clock
leakage
multiplexing of analog signal sources
reset (EXT)
mode
reference
reference circuit
termination cycles 5-36,
5-55
compare bits (FOC)
logic level one on
output compare (FOC) bit
size 9-29,
assertion response (FRZ)
bus monitor (FRZBM) 5-3,
software enable (FRZSW) 5-3,
counter (Y)
prescaler (X)
VCO (W)
5-7
D-76
5-7
11-8
D-7
11-8
input signal (PCLK)
input timing diagram
off (EXOFF) bit
read cycle timing diagram
write cycle timing diagram
PWMA/B (F1A/B) bit
ADC 8-4,
GPT 11-3,
QSM 9-3,
SIM
4-43
11-17
5-71
D-75
10-17
D-6
8-23
D-6
5-3
8-14
D-8
5-4
10-21
D-8
D-8
5-40
D-8
D-30
D-39
D-68
5-5
D-63
D-6
11-14
5-55
–F–
D-68
5-39
11-1
11-1
A-28
D-76
D-75
Freescale Semiconductor, Inc.
D-6
5-40
For More Information On This Product,
A-31
A-32
D-6
8-20
D-63
Go to: www.freescale.com
Gain
Gated time accumulation mode
General-purpose timer (GPT). See GPT
GPT
address map
block diagram
capture/compare unit
features
general
interrupt sources 11-6,
interrupts
pins
polled and interrupt-driven operation
prescaler
pulse
reference manual
registers
8-19
block diagram
information
-purpose I/O
accumulator
-width modulation
capture/compare registers
input
interrupt
module
OC1 action
output compare registers (TOC)
parallel I/O registers
prescaler register (PRESCL)
pulse
11-7
3-2
block diagram
unit (PWM)
action
timer
capture 4/output compare 5 registers
capture registers (TIC)
configuration register (ICR)
control registers
configuration register (GPTMCR)
test register (GPTMTR)
data register (OC1D)
mask register (OC1M)
port GP data
accumulator registers
11-2
11-8
11-5
block diagram
counter
data register (OC1D)
mask register (OC1M)
compare
interrupt flag register 2 (TFLG2)
timer interrupt mask registers (TMSK)
direction
register (PORTGP) 11-8,
D-67
11-2
11-1
11-14
11-8
(TI4/O5) D-72
11-1
11-11
–G–
11-16
11-18
11-10
11-13, 11-14,
11-10,
11-14,
D-69
11-15
register
force
11-15
11-17
11-12
D-69
D-69
D-69
D-71
register
D-68
D-77
(DDRGP)
11-14
11-1
11-14
D-74
D-68
11-4
D-71
D-69
(CFORC)
D-67
11-10
11-8,
I-5
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