MC68HC16Z1MAG16 Freescale Semiconductor, MC68HC16Z1MAG16 Datasheet - Page 245
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MC68HC16Z1MAG16
Manufacturer Part Number
MC68HC16Z1MAG16
Description
IC MPU 16BIT 16MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheet
1.MC68HC16Z1VEH16.pdf
(500 pages)
Specifications of MC68HC16Z1MAG16
Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Processor Series
HC16Z
Core
CPU16
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
SCI, QSPI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC16Z1MAG16
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- Current page: 245 of 500
- Download datasheet (6Mb)
M68HC16 Z SERIES
USER’S MANUAL
Clock control logic allows a selection of clock polarity and a choice of two clocking pro-
tocols to accommodate most available synchronous serial peripheral devices. When
the SPI is configured as a master, software selects one of 254 different bit rates for the
serial clock.
During an SPI transfer, data is simultaneously transmitted (shifted out serially) and re-
ceived (shifted in serially). A serial clock line synchronizes shifting and sampling of the
information on the two serial data lines. A slave-select line allows individual selection
of a slave SPI device. Slave devices which are not selected do not interfere with SPI
bus activities. On a master SPI device the slave-select line can optionally be used to
indicate a multiple-master bus contention.
MCU CLOCK
INTERNAL
MODULUS
COUNTER
SELECT
SPI STATUS REGISTER
SPI CONTROL
SPI CLOCK (MASTER)
SPI INTERRUPT
REQUEST
MULTICHANNEL COMMUNICATION INTERFACE
Freescale Semiconductor, Inc.
For More Information On This Product,
MSTR
SPE
Figure 10-2 SPI Block Diagram
Go to: www.freescale.com
INTERNAL
DATA BUS
MSB
8/16-BIT SHIFT REGISTER
READ DATA BUFFER
CONTROL
LOGIC
SHIFT
SPI CONTROL REGISTER
LSB
CLOCK
LOGIC
CLOCK
S
M
M
S
M
S
MCCI SPI BLOCK
PMC0
PMC2
MISO
PMC1
PMC3
MOSI
SCK
SS
10-5
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