M30263F6AFP#U5A Renesas Electronics America, M30263F6AFP#U5A Datasheet - Page 147
M30263F6AFP#U5A
Manufacturer Part Number
M30263F6AFP#U5A
Description
IC M16C/26A MCU FLASH 42-SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet
1.M30260F3AGPU5A.pdf
(354 pages)
Specifications of M30263F6AFP#U5A
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
33
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
42-SSOP
For Use With
R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
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1
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Figure 12.3.1.1.1 Usage Example of Position-data-retain Function ( U phase )
6
0
12.3.1 Position-data-retain Function
2
C
9
0 .
B
2 /
This function is used to retain the position data synchronously with the three-phase waveform
output.There are three position-data input pins for U, V, and W phases.
A trigger to retain the position data (hereafter, this trigger is referred to as "retain trigger") can be selected
by the retain-trigger polarity select bit(bit 3 of the position-data-retain function control register, at address
034E
of each positive phase.
0
0
12.3.1.1 Operation of the Position-data-retain Function
PDRU bit in the RDRF register
NOTE:
6
2
A
0
Figure 12.3.1.1.1 shows a usage example of the position-data-retain function (U phase) when the
retain trigger is selected as the falling edge of the positive signal.
(1) At the falling edge of the U-phase waveform ouput, the state at pin IDU is transferred to the U-
phase position data retain bit ( bit2 at address 034E
(2) Until the next falling edge of the Uphase waveform output,the above value is retained.
F
1. The retain trigger is the falling edge of the positive signal.
2
e
U-phase waveform output
U-phase waveform output
G
16
0 -
b
1 .
o r
2
). This bit selects the retain trigger to be the falling edge of each positive phase, or the rising edge
0
, 5
u
0
p
2
0
(
M
0
Carrier wave
7
1
6
C
Pin IDU
page 128
2 /
6
, A
M
1
f o
6
C
3
2
2 /
Transferred
9
6
, B
M
1
6
C
2 /
6
) T
1
Transferred
16
).
2
Transferred
Transferred
12. Timer
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