MC908MR32CFUE Freescale Semiconductor, MC908MR32CFUE Datasheet - Page 260

• Manufacturer Part Number: MC908MR32CFUE
• Description: IC MCU 8MHZ 32K FLASH 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908MR32CFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 44
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 6
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Development Support
18.3.1.5 Echoing
As shown in
pin for error checking.
Any result of a command appears after the echo of the last byte of the command.
18.3.1.6 Break Signal
A start bit followed by nine low bits is a break signal. See
signal, it drives the PTA0 pin high for the duration of two bits before echoing the break signal.
18.3.1.7 Commands
The monitor ROM uses these commands (see
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•
•
•
•
•
•
READ, read memory
WRITE, write memory
IREAD, indexed read
IWRITE, indexed write
READSP, read stack pointer
RUN, run user program
Figure
SENT TO
MONITOR
ECHO
18-11, the monitor ROM immediately echoes each received byte back to the PTA0
0
1
READ
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
2
3
MISSING STOP BIT
Figure 18-12. Break Transaction
4
READ
Figure 18-11. Read Transaction
5
6
ADDR. HIGH
7
Table 18-3–Table
ADDR. HIGH ADDR. LOW
Figure
2--STOP-BIT DELAY BEFORE ZERO ECHO
0
18-12. When the monitor receives a break
1
18-8):
2
ADDR. LOW
3
4
5
6
RESULT
DATA
Freescale Semiconductor
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