MC908MR32CFUE Freescale Semiconductor, MC908MR32CFUE Datasheet - Page 171

• Manufacturer Part Number: MC908MR32CFUE
• Description: IC MCU 8MHZ 32K FLASH 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908MR32CFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 44
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 6
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.7.2 SCI Control Register 2
SCI control register 2 (SCC2):
SCTIE — SCI Transmit Interrupt Enable Bit
TCIE — Transmission Complete Interrupt Enable Bit
Freescale Semiconductor
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This read/write bit enables the SCTE bit to generate SCI transmitter CPU interrupt requests. Setting
the SCTIE bit in SCC3 enables SCTE CPU interrupt requests. Reset clears the SCTIE bit.
This read/write bit enables the TC bit to generate SCI transmitter CPU interrupt requests. Reset clears
the TCIE bit.
1 = SCTE enabled to generate CPU interrupt
0 = SCTE not enabled to generate CPU interrupt
1 = TC enabled to generate CPU interrupt requests
0 = TC not enabled to generate CPU interrupt requests
Enables these CPU interrupt requests:
–
–
–
–
Enables the transmitter
Enables the receiver
Enables SCI wakeup
Transmits SCI break characters
Enables the SCTE bit to generate transmitter CPU interrupt requests
Enables the TC bit to generate transmitter CPU interrupt requests
Enables the SCRF bit to generate receiver CPU interrupt requests
Enables the IDLE bit to generate receiver CPU interrupt requests
Address: $0039
Reset:
Read:
Write:
M
0
1
0
0
1
1
Control Bits
SCTIE
Bit 7
0
PEN:PTY
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
0X
0X
10
11
10
11
Figure 13-9. SCI Control Register 2 (SCC2)
Table 13-4. Character Format Selection
TCIE
6
0
Start
Bits
1
1
1
1
1
1
SCRIE
5
0
Data
Bits
8
9
7
7
8
8
ILIE
4
0
Character Format
Parity
None
None
Even
Even
Odd
Odd
TE
3
0
Stop
Bits
RE
2
0
1
1
1
1
1
1
RWU
Character
1
0
Length
10 bits
11 bits
10 bits
10 bits
11 bits
11 bits
Bit 0
SBK
0
I/O Registers
171