MC9S12XDT256MAG Freescale Semiconductor, MC9S12XDT256MAG Datasheet - Page 468

IC MCU 256K FLASH 144-LQFP

MC9S12XDT256MAG

Manufacturer Part Number
MC9S12XDT256MAG
Description
IC MCU 256K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256MAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (24-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
10.4.5.1
As shown in
run mode.
10.4.5.2
The WAI instruction puts the MCU in a low power consumption stand-by mode. If the CSWAI bit is set,
additional power can be saved in power down mode because the CPU clocks are stopped. After leaving
this power down mode, the MSCAN restarts its internal controllers and enters normal mode again.
While the CPU is in wait mode, the MSCAN can be operated in normal mode and generate interrupts
(registers can be accessed via background debug mode). The MSCAN can also operate in any of the
low-power modes depending on the values of the SLPRQ/SLPAK and CSWAI bits as seen in
10.4.5.3
The STOP instruction puts the MCU in a low power consumption stand-by mode. In stop mode, the
MSCAN is set in power down mode regardless of the value of the SLPRQ/SLPAK and CSWAI bits
(Table
10.4.5.4
The CPU can request the MSCAN to enter this low power mode by asserting the SLPRQ bit in the
CANCTL0 register. The time when the MSCAN enters sleep mode depends on a fixed synchronization
delay and its current activity:
468
1
‘X’ means don’t care.
10-36).
CPU Mode
STOP
WAIT
RUN
Table
Operation in Run Mode
Operation in Wait Mode
Operation in Stop Mode
MSCAN Sleep Mode
10-36, only MSCAN sleep mode is available as low power option when the CPU is in
CSWAI = X
SLPRQ = 0
SLPRQ = 0
CSWAI = 0
SLPAK = 0
SLPAK = 0
Table 10-36. CPU vs. MSCAN Operating Modes
Normal
MC9S12XDP512 Data Sheet, Rev. 2.21
1
CSWAI = X
SLPRQ = 1
SLPRQ = 1
CSWAI = 0
SLPAK = 1
SLPAK = 1
Sleep
MSCAN Mode
Reduced Power Consumption
Power Down
SLPRQ = X
SLPRQ = X
CSWAI = X
CSWAI = 1
SLPAK = X
SLPAK = X
Freescale Semiconductor
SLPRQ = X
SLPRQ = X
SLPRQ = X
CSWAI = X
CSWAI = X
CSWAI = X
SLPAK = X
SLPAK = X
SLPAK = X
(CANE=0)
Disabled
Table
10-36.

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