MC9S12XDT256MAG Freescale Semiconductor, MC9S12XDT256MAG Datasheet - Page 1189

IC MCU 256K FLASH 144-LQFP

MC9S12XDT256MAG

Manufacturer Part Number
MC9S12XDT256MAG
Description
IC MCU 256K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT256MAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (24-ch x 10-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 29
128 Kbyte Flash Module (S12XFTX128K1V1)
29.1
This document describes the FTX128K1 module that includes a 128 Kbyte Flash (nonvolatile) memory.
The Flash memory may be read as either bytes, aligned words or misaligned words. Read access time is
one bus cycle for bytes and aligned words, and two bus cycles for misaligned words.
The Flash memory is ideal for program and data storage for single-supply applications allowing for field
reprogramming without requiring external voltage sources for program or erase. Program and erase
functions are controlled by a command driven interface. The Flash module supports both block erase and
sector erase. An erased bit reads 1 and a programmed bit reads 0. The high voltage required to program
and erase the Flash memory is generated internally. It is not possible to read from a Flash block while it is
being erased or programmed.
29.1.1
Command Write Sequence — A three-step MCU instruction sequence to execute built-in algorithms
(including program and erase) on the Flash memory.
Multiple-Input Signature Register (MISR) — A Multiple-Input Signature Register is an output
response analyzer implemented using a linear feedback shift-register (LFSR). A 16-bit MISR is used to
compress data and generate a signature that is particular to the data read from a Flash block.
29.1.2
Freescale Semiconductor
128 Kbytes of Flash memory comprised of one 128 Kbyte block divided into 128 sectors of 1024
bytes
Automated program and erase algorithm
Interrupts on Flash command completion, command buffer empty
Fast sector erase and word program operation
2-stage command pipeline for faster multi-word program times
Sector erase abort feature for critical interrupt response
Flexible protection scheme to prevent accidental program or erase
Single power supply for all Flash operations including program and erase
Introduction
Glossary
Features
A Flash word must be in the erased state before being programmed.
Cumulative programming of bits within a Flash word is not allowed.
MC9S12XDP512 Data Sheet, Rev. 2.21
CAUTION
1191

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