D12312SVTEBL25 Renesas Electronics America, D12312SVTEBL25 Datasheet - Page 77

• Manufacturer Part Number: D12312SVTEBL25
• Description: IC H8S MCU ROMLESS 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVTEBL25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412312SVTEBL25; HD6412312SVTEBL25

Bcc (Branch conditionally)
Operand Format and Number of States Required for Execution
Notes
1. The branch destination address must be even.
2. In machine language BRA, BRN, BCC, and BCS are identical to BT, BF, BHS, and BLO,
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Program-counter
relative
Addressing
respectively.
Mode
BRA (BT)
BRN (BF)
BHI
BLS
Bcc (BHS)
BCS (BLO)
BNE
BEQ
BVC
BVS
BPL
BMI
BGE
BLT
BGT
BLE
Mnemonic
Operands
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
d:8
d:16
1st byte
4
5
4
5
4
5
4
5
4
5
4
5
4
5
4
5
4
5
4
5
4
5
4
5
4
5
4
5
4
5
4
5
A
B
C
D
E
0
8
1
8
2
8
3
8
4
8
5
8
6
8
7
8
8
8
9
8
8
8
8
8
8
F
8
2nd byte
A
B
C
D
E
0
1
2
3
4
5
6
7
8
9
F
Instruction Format
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
Rev. 4.00 Feb 24, 2006 page 61 of 322
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Section 2 Instruction Descriptions
3rd byte
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
disp
Conditional Branch
4th byte
REJ09B0139-0400
States
No. of
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3
2
3