D12312SVTEBL25 Renesas Electronics America, D12312SVTEBL25 Datasheet - Page 123

IC H8S MCU ROMLESS 100-QFP

D12312SVTEBL25

Manufacturer Part Number
D12312SVTEBL25
Description
IC H8S MCU ROMLESS 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12312SVTEBL25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412312SVTEBL25
HD6412312SVTEBL25
2.2.28 (2)
DIVXU (DIVide eXtend as Unsigned)
Operation
ERd
Assembly-Language Format
DIVXU.W Rs, ERd
Operand Size
Word
Description
This instruction divides the contents of a 32-bit register ERd (destination operand) by the contents
of a 16-bit register Rs (source register) and stores the result in the 32-bit register ERd. The
division is unsigned. The operation performed is 32 bits
remainder. The quotient is placed in the lower 16 bits (Rd) of the 32-bit register ERd. The
remainder is placed in the upper 16 bits of (Ed).
Valid results are not assured if division by zero is attempted or an overflow occurs.
Available Registers
ERd: ER0 to ER7
Rs:
R0 to R7, E0 to E7
Rs
DIVXU (W)
ERd
Dividend
32 bits
ERd
Divisor
16 bits
Rs
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the divisor is negative;
Z: Set to 1 if the divisor is zero; otherwise
V: Previous value remains unchanged.
C: Previous value remains unchanged.
otherwise cleared to 0.
cleared to 0.
Remainder
Rev. 4.00 Feb 24, 2006 page 107 of 322
I
16 bits
16 bits
UI H
Section 2 Instruction Descriptions
ERd
16-bit quotient and 16-bit
Quotient
16 bits
U
N
REJ09B0139-0400
Z
— —
V
C
Divide

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