MC9S08GT16ACFBE Freescale Semiconductor, MC9S08GT16ACFBE Datasheet - Page 15

• Manufacturer Part Number: MC9S08GT16ACFBE
• Description: IC MCU 16K FLASH 2K RAM 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08GT16ACFBE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 36
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PQFP
• Processor Series: S08GT
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: M68EVB908GB60E, M68DEMO908GB60E
• Minimum Operating Temperature: - 40 C
• For Use With: M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Section Number
11.3 Functional Description ..................................................................................................................181
12.1 Introduction ...................................................................................................................................187
12.2 External Signal Description ..........................................................................................................192
12.3 Modes of Operation .......................................................................................................................193
12.4 Register Definition ........................................................................................................................193
12.5 Functional Description ..................................................................................................................198
12.6 Initialization/Application Information ..........................................................................................201
Freescale Semiconductor
11.3.1 Baud Rate Generation .....................................................................................................181
11.3.2 Transmitter Functional Description ................................................................................181
11.3.3 Receiver Functional Description .....................................................................................182
11.3.4 Interrupts and Status Flags ..............................................................................................184
11.3.5 Additional SCI Functions ...............................................................................................185
12.1.1 Features ...........................................................................................................................189
12.1.2 Block Diagrams ..............................................................................................................190
12.1.3 SPI Baud Rate Generation ..............................................................................................191
12.2.1 SPSCK — SPI Serial Clock ............................................................................................192
12.2.2 MOSI — Master Data Out, Slave Data In ......................................................................192
12.2.3 MISO — Master Data In, Slave Data Out ......................................................................192
12.2.4 SS — Slave Select ...........................................................................................................192
12.3.1 SPI in Stop Modes ..........................................................................................................193
12.4.1 SPI Control Register 1 (SPIC1) ......................................................................................193
12.4.2 SPI Control Register 2 (SPIC2) ......................................................................................194
12.4.3 SPI Baud Rate Register (SPIBR) ....................................................................................195
12.4.4 SPI Status Register (SPIS) ..............................................................................................196
12.4.5 SPI Data Register (SPID) ................................................................................................197
12.5.1 SPI Clock Formats ..........................................................................................................198
12.5.2 SPI Interrupts ..................................................................................................................201
12.5.3 Mode Fault Detection .....................................................................................................201
11.3.2.1 Send Break and Queued Idle .........................................................................182
11.3.3.1 Data Sampling Technique .............................................................................183
11.3.3.2 Receiver Wakeup Operation .........................................................................183
11.3.5.1 8- and 9-Bit Data Modes ...............................................................................185
11.3.5.2 Stop Mode Operation ....................................................................................185
11.3.5.3 Loop Mode ....................................................................................................186
11.3.5.4 Single-Wire Operation ..................................................................................186
12.1.2.1 SPI System Block Diagram ..........................................................................190
12.1.2.2 SPI Module Block Diagram ..........................................................................190
11.3.3.2.1Idle-Line Wakeup .....................................................................184
11.3.3.2.2Address-Mark Wakeup .............................................................184
Serial Peripheral Interface (S08SPIV3)
MC9S08GT16A/GT8A Data Sheet, Rev. 1
Chapter 12
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