MC9S08GT16ACFBE Freescale Semiconductor, MC9S08GT16ACFBE Datasheet - Page 13

IC MCU 16K FLASH 2K RAM 44-QFP

MC9S08GT16ACFBE

Manufacturer Part Number
MC9S08GT16ACFBE
Description
IC MCU 16K FLASH 2K RAM 44-QFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08GT16ACFBE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
36
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Processor Series
S08GT
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Section Number
9.1
9.2
9.3
9.4
9.5
Freescale Semiconductor
Introduction ...................................................................................................................................125
External Signal Description ..........................................................................................................129
Register Definition ........................................................................................................................131
Functional Description ..................................................................................................................136
Initialization/Application Information ..........................................................................................143
9.1.1 Features ...........................................................................................................................127
9.1.2 Modes of Operation ........................................................................................................128
9.1.3 Block Diagram ................................................................................................................129
9.2.1 EXTAL — External Reference Clock / Oscillator Input ................................................129
9.2.2 XTAL — Oscillator Output ............................................................................................129
9.2.3 External Clock Connections ...........................................................................................130
9.2.4 External Crystal/Resonator Connections ........................................................................130
9.3.1 ICG Control Register 1 (ICGC1) ....................................................................................131
9.3.2 ICG Control Register 2 (ICGC2) ....................................................................................133
9.3.3 ICG Status Register 1 (ICGS1) .......................................................................................134
9.3.4 ICG Status Register 2 (ICGS2) .......................................................................................135
9.3.5 ICG Filter Registers (ICGFLTU, ICGFLTL) ..................................................................135
9.3.6 ICG Trim Register (ICGTRM) .......................................................................................136
9.4.1 Off Mode (Off) ................................................................................................................137
9.4.2 Self-Clocked Mode (SCM) .............................................................................................137
9.4.3 FLL Engaged, Internal Clock (FEI) Mode .....................................................................138
9.4.4 FLL Engaged Internal Unlocked ....................................................................................139
9.4.5 FLL Engaged Internal Locked ........................................................................................139
9.4.6 FLL Bypassed, External Clock (FBE) Mode ..................................................................139
9.4.7 FLL Engaged, External Clock (FEE) Mode ...................................................................139
9.4.8 FLL Lock and Loss-of-Lock Detection ..........................................................................140
9.4.9 FLL Loss-of-Clock Detection .........................................................................................141
9.4.10 Clock Mode Requirements .............................................................................................142
9.4.11 Fixed Frequency Clock ...................................................................................................143
9.4.12 High Gain Oscillator .......................................................................................................143
9.5.1 Introduction .....................................................................................................................143
9.5.2 Example #1: External Crystal = 32 kHz, Bus Frequency = 4.19 MHz ...........................145
9.5.3 Example #2: External Crystal = 4 MHz, Bus Frequency = 20 MHz ..............................147
9.5.4 Example #3: No External Crystal Connection, 5.4 MHz Bus Frequency ......................149
9.5.5 Example #4: Internal Clock Generator Trim ..................................................................151
9.4.1.1
9.4.1.2
9.4.1.3
9.4.7.1
9.4.7.2
BDM Active ..................................................................................................137
OSCSTEN Bit Set .........................................................................................137
Stop/Off Mode Recovery ..............................................................................137
FLL Engaged External Unlocked .................................................................140
FLL Engaged External Locked .....................................................................140
Internal Clock Generator (S08ICGV4)
MC9S08GT16A/GT8A Data Sheet, Rev. 1
Chapter 9
Title
Page
13

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