S9S12P128J0MFT Freescale Semiconductor, S9S12P128J0MFT Datasheet - Page 66

• Manufacturer Part Number: S9S12P128J0MFT
• Description: MCU 128K FLASH AUTO 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12P128J0MFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Controller Family/series: S12
• No. Of I/o's: 34
• Ram Memory Size: 6KB
• Cpu Speed: 32MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Read: Anytime
Port Integration Module (S12PPIMV1)
2.3.9
66
Address 0x0009
Write: Anytime
DDRE
Field
Field
Reset
7-2
PE
PE
PE
4
1
0
W
R
Port E general purpose input/output data—Data Register, ECLK output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port E general purpose input data and interrupt—Data Register, IRQ input.
This pin can be used as general purpose and IRQ input.
Port E general purpose input data and interrupt—Data Register, XIRQ input.
This pin can be used as general purpose and XIRQ input.
Port E Data Direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin is configured as output
0 Associated pin is configured as input
• The ECLK output function takes precedence over the general purpose I/O function if enabled.
DDRE7
Port E Data Direction Register (DDRE)
0
7
= Unimplemented or Reserved
DDRE6
Table 2-8. PORTE Register Field Descriptions (continued)
0
6
Figure 2-7. Port E Data Direction Register (DDRE)
Table 2-9. DDRE Register Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
DDRE5
5
0
DDRE4
0
4
Description
Description
DDRE3
0
3
DDRE2
0
2
Access: User read/write
Freescale Semiconductor
0
0
1
0
0
0
(1)