S9S12P128J0MFT Freescale Semiconductor, S9S12P128J0MFT Datasheet - Page 381

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S9S12P128J0MFT

Manufacturer Part Number
S9S12P128J0MFT
Description
MCU 128K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12P128J0MFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Controller Family/series
S12
No. Of I/o's
34
Ram Memory Size
6KB
Cpu Speed
32MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11.4.5
11.4.5.1
The SCI transmitter can accommodate either 8-bit or 9-bit data characters. The state of the M bit in SCI
control register 1 (SCICR1) determines the length of data characters. When transmitting 9-bit data, bit T8
in SCI data register high (SCIDRH) is the ninth bit (bit 8).
11.4.5.2
To transmit data, the MCU writes the data bits to the SCI data registers (SCIDRH/SCIDRL), which in turn
are transferred to the transmitter shift register. The transmit shift register then shifts a frame out through
the TXD pin, after it has prefaced them with a start bit and appended them with a stop bit. The SCI data
registers (SCIDRH and SCIDRL) are the write-only buffers between the internal data bus and the transmit
shift register.
Freescale Semiconductor
TDRE IRQ
BER IRQ
TC IRQ
Clock
Bus
SBR12:SBR0
Transmitter
Transmitter Character Length
Character Transmission
Baud Divider
PE
PT
M
Generation
÷ 16
Parity
T8
Figure 11-16. Transmitter Block Diagram
BERRIF
S12P-Family Reference Manual, Rev. 1.13
TDRE
TCIE
TCIE
TIE
TC
H
8
7
11-Bit Transmit Register
6
5
SCI Data Registers
4
Internal Bus
Transmitter Control
TE
3
2
Collision Detect
SBK
1
Transmit
0
BERRM[1:0]
L
Serial Communication Interface (S12SCIV5)
TXPOL
CONTROL
LOOP
SCTXD
SCRXD
(From Receiver)
LOOPS
RSRC
To Receiver
SCTXD
381

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