S9S12P128J0MFT Freescale Semiconductor, S9S12P128J0MFT Datasheet - Page 344

• Manufacturer Part Number: S9S12P128J0MFT
• Description: MCU 128K FLASH AUTO 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12P128J0MFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Controller Family/series: S12
• No. Of I/o's: 34
• Ram Memory Size: 6KB
• Cpu Speed: 32MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pulse-Width Modulator (PWM8B6CV1) Block Description
Read: anytime
Write: anytime (causes the scale counter to load the PWMSCLA value)
10.3.2.10 PWM Scale B Register (PWMSCLB)
PWMSCLB is the programmable scale value used in scaling clock B to generate clock SB. Clock SB is
generated by taking clock B, dividing it by the value in the PWMSCLB register and dividing that by two.
Any value written to this register will cause the scale counter to load the new scale value (PWMSCLB).
Read: anytime
Write: anytime (causes the scale counter to load the PWMSCLB value).
10.3.2.11 Reserved Registers (PWMSCNTx)
The registers PWMSCNTA and PWMSCNTB are reserved for factory testing of the PWM module and
are not available in normal modes.
344
Module Base + 0x0009
Module Base + 0x000A
Reset
Reset
W
W
R
R
Clock SB = Clock B / (2 * PWMSCLB)
Bit 7
0
0
0
7
7
When PWMSCLB = 0x0000, PWMSCLB value is considered a full scale
value of 256. Clock B is thus divided by 512.
= Unimplemented or Reserved
0
0
0
6
6
6
Figure 10-12. PWM Scale B Register (PWMSCLB)
Figure 10-13. Reserved Register (PWMSCNTA)
S12P-Family Reference Manual, Rev. 1.13
0
0
0
5
5
5
NOTE
0
0
0
4
4
4
0
0
0
3
3
3
0
0
0
2
2
2
Freescale Semiconductor
0
0
0
1
1
1
Bit 0
0
0
0
0
0