S9S12P128J0MFT Freescale Semiconductor, S9S12P128J0MFT Datasheet - Page 213

• Manufacturer Part Number: S9S12P128J0MFT
• Description: MCU 128K FLASH AUTO 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12P128J0MFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Controller Family/series: S12
• No. Of I/o's: 34
• Ram Memory Size: 6KB
• Cpu Speed: 32MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.3.2.7
This register controls the PLL functionality.
Read: Anytime
Write: Anytime if PROT=0 (CPMUPROT register) and PLLSEL=1 (CPMUCLKS register). Else write has
no effect.
Freescale Semiconductor
0x003A
FM1, FM0
Reset
Field
5, 4
W
R
PLL Frequency Modulation Enable Bits — FM1 and FM0 enable frequency modulation on the VCOCLK. This
is to reduce noise emission. The modulation frequency is f
S12CPMU PLL Control Register (CPMUPLL)
0
0
7
Write to this register clears the LOCK and UPOSC status bits.
Care should be taken to ensure that the bus frequency does not exceed the
specified maximum when frequency modulation is enabled.
The frequency modulation (FM1 and FM0) can not be used if the Oscillator
Filter is enabled.
Figure 7-10. S12CPMU PLL Control Register (CPMUPLL)
0
0
6
Table 7-6. CPMUPLL Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
Table 7-7. FM Amplitude selection
FM1
FM1
0
5
0
0
1
1
0
1
0
1
FM0
NOTE
NOTE
NOTE
FM0
0
4
Description
FM Amplitude /
FM off
±1%
±2%
±4%
S12 Clock, Reset and Power Management Unit (S12CPMU)
f
VCO
ref
0
0
3
divided by 16. See
Variation
0
0
2
Table 7-7
0
0
1
for coding.
0
0
0
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