S9S12P128J0MFT Freescale Semiconductor, S9S12P128J0MFT Datasheet - Page 278
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S9S12P128J0MFT
Manufacturer Part Number
S9S12P128J0MFT
Description
MCU 128K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of S9S12P128J0MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Controller Family/series
S12
No. Of I/o's
34
Ram Memory Size
6KB
Cpu Speed
32MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Freescale’s Scalable Controller Area Network (S12MSCANV3)
Reset: Undefined because of RAM-based implementation
8.3.3.1
The identifier registers for an extended format identifier consist of a total of 32 bits; ID[28:0], SRR, IDE,
and RTR bits. The identifier registers for a standard format identifier consist of a total of 13 bits; ID[10:0],
RTR, and IDE bits.
278
Register
0x00X0
0x00X1
0x00X2
0x00X3
•
•
Name
IDR0
IDR1
IDR2
IDR3
For transmit buffers, anytime when TXEx flag is set (see
Flag Register
Section 8.3.2.11, “MSCAN Transmit Buffer Selection Register
Unimplemented for receive buffers.
Identifier Registers (IDR0–IDR3)
W
W
W
W
Figure 8-25. Receive/Transmit Message Buffer — Standard Identifier Mapping
R
R
R
R
Bit 7
ID10
ID2
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
= Unused, always read ‘x’
ID9
ID1
6
S12P-Family Reference Manual, Rev. 1.13
ID8
ID0
5
RTR
ID7
4
IDE (=0)
Section 8.3.2.7, “MSCAN Transmitter
ID6
3
(CANTBSEL)”).
ID5
2
Freescale Semiconductor
ID4
1
Bit 0
ID3
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