ST10F272M-4TR3 STMicroelectronics, ST10F272M-4TR3 Datasheet - Page 85

• Manufacturer Part Number: ST10F272M-4TR3
• Description: MCU 16BIT 256K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F272M-4TR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F272M
Synchronous reset and RPD pin
Whenever the RSTIN pin is pulled low (by external hardware or as a consequence of a
Bidirectional reset), the RPD internal weak pull-down is activated. The external capacitance
(if any) on RPD pin is slowly discharged through the internal weak pull-down. If the voltage
level on RPD pin reaches the input low threshold (approximately 2.5 V), the reset event
becomes immediately asynchronous. In case of hardware reset (short or long) the situation
goes immediately to the one illustrated in
above the input threshold: the asynchronous reset is completed coherently. To correctly
complete a synchronous reset, the value of the capacitance must be big enough to maintain
a sufficiently high voltage on the RPD pin for the duration of the internal reset sequence.
For a software or watchdog reset events, an active synchronous reset is completed
regardless of the RPD status.
It is important to highlight that the signal that makes RPD status transparent under reset is
the internal RSTF (after the noise filter).
Figure 21. Synchronous short/long hardware reset (EA = 1)
1. RSTIN assertion can be released there. Refer also to
2. If during the reset condition (RSTIN low), RPD voltage drops below the threshold voltage (about 2.5V for
3. RSTIN pin is pulled low if bit BDRSTEN (bit 3 of SYSCON register) was previously set by software. Bit
4. Minimum RSTIN low pulse duration shall also be longer than 500ns to guarantee the pulse is not masked
5V operation), the asynchronous reset is then immediately entered.
BDRSTEN is cleared after reset.
by the internal filter (refer to
(after filter)
P0[15:13]
IBUS-CS
(Internal)
RSTOUT
FLARST
RSTF
P0[12:2]
P0[1:0]
RSTIN
RPD
RST
≤ 500ns
≥ 50ns
≤4 TCL
200 µA discharge
(4)
(1)
≤12 TCL
Not t.
Section
≤ 500ns
≥ 50ns
21.1)
(3)
< 1032 TCL
1024 TCL
Not transparent
Not transparent
Transparent
Figure
Section 21.1
≤ 500 ns
≥ 50 ns
19. There is no effect if RPD comes again
8 TCL
≤ 1ms
(2)
At this time RSTF is sampled HIGH or LOW
so it is SHORT or LONG reset
V
RPD
for details on minimum pulse duration.
> 2.5 V asynchronous reset not entered
≤ 2 TCL
Not t.
Not t.
7 TCL
System reset
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