ST10F272M-4TR3 STMicroelectronics, ST10F272M-4TR3 Datasheet - Page 104

• Manufacturer Part Number: ST10F272M-4TR3
• Description: MCU 16BIT 256K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F272M-4TR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Power reduction modes
21.3.1
104/176
In normal running mode (that is when main V
during reset to exercise the EA functionality associated with the same pin: the voltage
supply for the circuitries which are usually biased with V
oscillator used in conjunction with real-time clock module), is granted by the active main
V
It must be noted that stand-by mode can generate problems associated with the usage of
different power supplies in CMOS systems; particular attention must be paid when the
ST10F272M I/O lines are interfaced with other external CMOS integrated circuits: if V
ST10F272M becomes (for example, in stand-by mode) lower than the output level forced by
the I/O lines of these external integrated circuits, the ST10F272M could be directly powered
through the inherent diode existing on ST10F272M output driver circuitry. The same is valid
for ST10F272M interfaced to active/inactive communication buses during stand-by mode:
current injection can be generated through the inherent diode.
Furthermore, the sequence of turning on/off of the different voltage could be critical for the
system (not only for the ST10F272M device). The device stand-by mode current (I
vary while V
and V
phenomenon.
Entering stand-by mode
As already stated, to enter stand-by mode the XRAM2EN bit in the XPERCON register must
be cleared: This allows the RAM interface to be frozen immediately, avoiding any data
corruption. As a consequence of a reset event, the RAM power supply is switched to the
internal low-voltage supply V
regulator). The RAM interface remains frozen until the bit XRAM2EN is set again by
software initialization routine (at next exit from main V
Since V
XRAM2EN bit is no longer able to guarantee its content (logic “0”), being the XPERCON
Register powered by internal V
by mode switching dedicated circuit continues to confirm the RAM interface freezing,
irrespective the XRAM2EN bit content; XRAM2EN bit status is considered again when
internal V
If internal V
with bit XRAM2EN set, the RAM supply switching circuit is not active: in case of a temporary
drop on internal V
spurious stand-by mode switching can occur (the RAM is not frozen and can still be
accessed).
The ST10F272M core module, generating the RAM control signals, is powered by internal
V
switched to V
from ST10F272M core (active low signal) is low enough to be recognized as a logic “0” by
the RAM interface (due to V
address for the RAM and an unwanted data corruption could occur. For this reason, an extra
interface, powered by the switched supply, is used to prevent the RAM from this kind of
potential corruption mechanism.
DD
18
.
supply; during turning off transient these control signals follow the V
STBY
18
18
is falling down (as a consequence of V
pins. System noise on both V
18
DD
comes back over internal stand-by reference V
18SB
becomes lower than internal stand-by reference (V
to V
18
internal reference. It could happen that a high level of RAM write strobe
STBY
voltage versus internal V
(and vice versa) transition occurs: some current flows between V
18
18SB
lower than V
18
. This does not generate any problem, because the stand-
(derived from V
DD
18SB
and V
DD
18SB
): The bus status could contain a valid
is on) the V
DD
STBY
STBY
during normal code execution, no
turning off), it can happen that the
DD
through the low-power voltage
can contribute to increase this
STBY
power-on reset sequence).
18SB
STBY
(see in particular the 32 kHz
.
18SB
pin can be tied to V
) of about 0.3 to 0.45V
18
, while RAM is
ST10F272M
STBY
SS
DD
) may
DD
of