STM32F103RET6TR STMicroelectronics, STM32F103RET6TR Datasheet - Page 66
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STM32F103RET6TR
Manufacturer Part Number
STM32F103RET6TR
Description
MCU ARM 32BIT 512KB FLASH 64LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F103VCT6.pdf
(123 pages)
Specifications of STM32F103RET6TR
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
51
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
497-10508 - BOARD EVAL FOR MEMS SENSORS497-10048 - BOARD EVAL ACCELEROMETER497-10030 - STARTER KIT FOR STM32KSDKSTM32-PL - KIT IAR KICKSTART STM32 CORTEXM3497-8512 - KIT STARTER FOR STM32F10XE MCU497-8511 - KIT STARTER FOR STM32 512K FLASH497-8505 - KIT STARTER FOR STM32F10XE MCU497-6438 - BOARD EVALUTION FOR STM32 512K497-6289 - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U - BOARD EVAL MCBSTM32 + ULINK2MCBSTM32 - BOARD EVAL FOR STM STM32X SER497-6053 - KIT STARTER FOR STM32497-6052 - KIT STARTER FOR STM32497-6050 - KIT STARTER FOR STM32497-6049 - KIT EVALUATION LOW COST STM32497-6048 - BOARD EVALUATION FOR STM32497-6047 - KIT DEVELOPMENT FOR STM32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F103RET6TR
Manufacturer:
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Quantity:
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Company:
Part Number:
STM32F103RET6TR
Manufacturer:
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Quantity:
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Electrical characteristics
66/123
Synchronous waveforms and timings
Figure 28
Table 38
with the following FSMC configuration:
●
●
●
●
●
Figure 28. Synchronous multiplexed NOR/PSRAM read timings
FSMC_AD[15:0]
FSMC_A[25:16]
FSMC_NWAIT
(WAITCFG = 1b, WAITPOL + 0b)
FSMC_NWAIT
(WAITCFG = 0b, WAITPOL + 0b)
FSMC_NADV
FSMC_NOE
FSMC_CLK
FSMC_NEx
BurstAccessMode = FSMC_BurstAccessMode_Enable;
MemoryType = FSMC_MemoryType_CRAM;
WriteBurst = FSMC_WriteBurst_Enable;
CLKDivision = 1; (0 is not supported, see the STM32F10xxx reference manual)
DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM
t d(CLKL-NADVL)
t d(CLKL-ADV)
provide the corresponding timings. The results shown in these tables are obtained
through
t w(CLK)
Figure 31
t d(CLKL-ADIV)
t d(CLKL-NExL)
t d(CLKL-AV)
AD[15:0]
represent synchronous waveforms and
Doc ID 14611 Rev 7
t su(NWAITV-CLKH)
t su(NWAITV-CLKH)
t d(CLKL-NADVH)
t su(ADV-CLKH)
Data latency = 1
t w(CLK)
t su(NWAITV-CLKH)
t d(CLKL-NOEL)
STM32F103xC, STM32F103xD, STM32F103xE
D1
t su(ADV-CLKH)
t h(CLKH-ADV)
t h(CLKH-NWAITV)
t h(CLKH-NWAITV)
t d(CLKH-NOEH)
t d(CLKH-NExH)
t d(CLKH-AIV)
t h(CLKH-NWAITV)
D2
Table 36
BUSTURN = 0
t h(CLKH-ADV)
through
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