ST72F561J4T6 STMicroelectronics, ST72F561J4T6 Datasheet - Page 226

• Manufacturer Part Number: ST72F561J4T6
• Description: IC MCU 8BIT 16K FLASH 44-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F561J4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: ST72F5x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• For Use With: 497-8374 - BOARD DEVELOPMENT FOR ST72F561
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST72561
12.5 CLOCK AND TIMING CHARACTERISTICS
Subject to general operating conditions for V
12.5.1 General Timings
12.5.2 External Clock Source
Figure 121. Typical Application with an External Clock Source
Notes:
1. Data based on typical application software.
2. Time measured between interrupt event and interrupt vector fetch. Δt
the current instruction execution.
3. Data based on design simulation and/or technology characteristics, not tested in production.
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t
t
Symbol
Symbol
w(OSC1H)
V
w(OSC1L)
V
t
t
t
r(OSC1)
c(INST)
f(OSC1)
OSC1H
t
OSC1L
v(IT)
I
L
V
V
OSC1H
OSC1L
Instruction cycle time
Interrupt reaction time
t
OSC1 input pin high level voltage
OSC1 input pin low level voltage
OSC1 high or low time
OSC1 rise or fall time
OSCx Input leakage current
EXTERNAL
CLOCK SOURCE
v(IT)
= Δt
c(INST)
Parameter
Parameter
t
r(OSC1)
+ 10
3)
2)
3)
t
f(OSC1)
OSC2
OSC1
90%
10%
f
f
DD
CPU
CPU
, f
V
see
= 8 MHz
= 8 MHz
OSC
SS
Conditions
Conditions
≤ V
Figure 121
, and T
t
Not connected internally
IN
w(OSC1H)
≤ V
DD
A
c(INST)
.
I
L
is the number of t
0.7 x V
t
w(OSC1L)
Min
V
25
1.25
Min
250
SS
10
2
f
DD
OSC
ST72XXX
Typ
Typ
375
3
CPU
1)
cycles needed to finish
0.3 x V
Max
1500
Max
2.75
V
12
22
±1
DD
5
DD
Unit
Unit
t
t
μA
CPU
CPU
ns
ns
μs
V