ST72F262G2B5 STMicroelectronics, ST72F262G2B5 Datasheet - Page 24

IC MCU 8BIT 8K FLASH 32-SDIP

ST72F262G2B5

Manufacturer Part Number
ST72F262G2B5
Description
IC MCU 8BIT 8K FLASH 32-SDIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F262G2B5

Core Processor
ST7
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-10°C ~ 85°C
Package / Case
32-SDIP (0.400", 10.16mm)
Processor Series
ST72F2x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
22
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7F264-IND/USB, ST72F34X-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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6.4 SYSTEM INTEGRITY MANAGEMENT (SI)
The System Integrity Management block contains
group the Low voltage Detector (LVD) and Auxilia-
ry Voltage Detector (AVD) functions. It is managed
by the SICSR register.
Note: A reset can also be triggered following the
detection of an illegal opcode or prebyte code. Re-
fer to
tails.
6.4.1 Low Voltage Detector (LVD)
The Low Voltage Detector function (LVD) gener-
ates a static reset when the V
below a V
secures the power-up as well as the power-down
keeping the ST7 in reset.
The V
than the V
to avoid a parasitic reset when the MCU starts run-
ning and sinks current on the supply (hysteresis).
The LVD Reset circuitry generates a reset when
V
The LVD function is illustrated in
The voltage threshold can be configured by option
byte to be low, medium or high.
Figure 14. Low Voltage Detector vs Reset
24/172
DD
– V
– V
RESET
is below:
IT-
IT+
IT-
Section 12.2.1 on page 123
V
V
reference value for a voltage drop is lower
when V
when V
IT-
IT+
IT+
IT-
reference value for power-on in order
reference value. This means that it
V
DD
DD
DD
is falling
is rising
DD
supply voltage is
Figure
for further de-
14.
Provided the minimum V
the oscillator frequency) is above V
can only be in two modes:
In these conditions, secure operation is always en-
sured for the application without the need for ex-
ternal reset hardware.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Notes:
The LVD allows the device to be used without any
external RESET circuitry.
The LVD is an optional function which can be se-
lected by option byte.
Use of LVD with capacitive power supply: with this
type of power supply, if power cuts occur in the ap-
plication, it is recommended to pull V
0V to ensure optimum restart conditions. Refer to
circuit example in
6.
It is recommended to make sure that the V
ply voltage rises monotonously when the device is
exiting from Reset, to ensure the application func-
tions properly.
V
– under full software control
– in static safe reset
hys
Figure 91 on page 151
DD
value (guaranteed for
IT-
DD
, the MCU
and note
down to
DD
sup-

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