ST7FLI49MK1T6 STMicroelectronics, ST7FLI49MK1T6 Datasheet - Page 123

• Manufacturer Part Number: ST7FLI49MK1T6
• Description: MCU 8BIT SGL VOLT FLASH 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLI49MK1T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FLI4x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST7LITE49M
Note:
I
Reset value: 0000 0000 (00h)
●
Address 01h is always ignored.
●
I
Reset value: 0100 0000 (40h)
Bits 7:6 = FR[1:0] Frequency bits
Table 44.
Bits 5:3 = Reserved
Bits 2:1 = ADD[9:8] Interface address
Bit 0 = Reserved.
2
2
C own address register (I2COAR1)
C own address register (I2COAR2)
ADD7
FR1
In 7-bit addressing mode
Bits 7:1 = ADD[7:1] Interface address. These bits define the I
interface. They are not cleared when the interface is disabled (PE=0).
Bit 0 = ADD0 Address direction bit.
This bit is don’t care, the interface acknowledges either 0 or 1. It is not cleared when
the interface is disabled (PE=0).
In 10-bit addressing mode
Bits 7:0 = ADD[7:0] Interface address. These are the least significant bits of the I
bus address of the interface. They are not cleared when the interface is disabled
(PE=0).
These bits are set by software only when the interface is disabled (PE=0). To configure
the interface to I
microcontroller frequency f
These are the most significant bits of the I
only). They are not cleared when the interface is disabled (PE=0).
7
7
Configuration of I
ADD6
FR0
6 to 8 MHz
< 6 MHz
2
f
C specified delays select the value corresponding to the
CPU
ADD5
0
Doc ID 13562 Rev 3
CPU
2
C delay times
.
ADD4
0
Read / Write
Read / Write
2
C bus address of the interface (10-bit mode
ADD3
0
FR1
0
0
ADD2
ADD9
2
C bus address of the
On-chip peripherals
ADD1
ADD8
FR0
0
1
ADD0
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0
0
0
2
C