P89LPC9151FDH,129 NXP Semiconductors, P89LPC9151FDH,129 Datasheet - Page 48

• Manufacturer Part Number: P89LPC9151FDH,129
• Description: IC 80C51 MCU FLASH 2KB 14TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC9151FDH,129

• Program Memory Type: FLASH
• Program Memory Size: 2KB (2K x 8)
• Package / Case: 14-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 4x8b; D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 10
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935290259129

NXP Semiconductors
P89LPC9151_61_71_2
Product data sheet
7.18.1 Reset vector
7.19.1 Mode 0
7.19.2 Mode 1
7.19.3 Mode 2
7.19.4 Mode 3
7.19.5 Mode 6
7.19 Timers/counters 0 and 1
Following reset, the P89LPC9151/9161/9171 will fetch instructions from either address
0000H or the Boot address. The Boot address is formed by using the boot vector as the
high byte of the address and the low byte of the address = 00H.
The boot address will be used if a UART break reset occurs, or the non-volatile boot
status bit (BOOTSTAT.0) = 1.
The P89LPC9151/9161/9171 devices have two general purpose counter/timers which are
upward compatible with the standard 80C51 Timer 0 and Timer 1. An option to
automatically toggle the T0 pin upon timer overflow has been added. In addition an option
to toggle the T1 pin upon overflow has been added on the P89LPC9171. In the ‘Timer’
function, the register is incremented every machine cycle. In the ‘Counter’ function, the
register of Timer 0 is incremented in response to a 1-to-0 transition at its external input
pin. This external input is sampled once every machine cycle.
Timer 0 has five operating modes (Modes 0, 1, 2, 3 and 6).
Timer 1 has four operating modes (Modes 0, 1, 2, and 3), except on the P89LPC9171
where Timer 1 also has Mode 6. Modes 0, 1, 2 and 6 are the same for both
Timers/Counters. Mode 3 is different.
Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit
Counter with a divide-by-32 prescaler. In this mode, the Timer register is configured as a
13-bit register. Mode 0 operation is the same for Timer 0 and Timer 1.
Mode 1 is the same as Mode 0, except that all 16 bits of the timer register are used.
Mode 2 configures the Timer register as an 8-bit Counter with automatic reload. Mode 2
operation is the same for Timer 0 and Timer 1.
When Timer 1 is in Mode 3 it is stopped. Timer 0 in Mode 3 forms two separate 8-bit
counters and is provided for applications that require an extra 8-bit timer. When Timer 1 is
in Mode 3 it can still be used by the serial port as a baud rate generator.
In this mode, the corresponding timer can be changed to a PWM with a full period of
256 timer clocks.
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•
•
During a power-on reset, both POF and BOF are set but the other flag bits are
cleared.
A Watchdog reset is similar to a power-on reset, both POF and BOF are set but the
other flag bits are cleared.
For any other reset, previously set flag bits that have not been cleared will remain set.
Rev. 02 — 9 February 2010
P89LPC9151/9161/9171
8-bit microcontroller with 8-bit ADC
© NXP B.V. 2010. All rights reserved.
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