ATMEGA2560V-8AU Atmel, ATMEGA2560V-8AU Datasheet - Page 289

IC AVR MCU 256K 8MHZ 100TQFP

ATMEGA2560V-8AU

Manufacturer Part Number
ATMEGA2560V-8AU
Description
IC AVR MCU 256K 8MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA2560V-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
ATMEGA256x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Number Of Timers
6
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
A/d Inputs
16-Channel, 10-Bit
Cpu Speed
8 MIPS
Eeprom Memory
4K Bytes
Input Output
86
Interface
2-Wire/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
100-pin TQFP
Programmable Memory
256K Bytes
Timers
2-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Package
100TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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25.8
25.8.1
2549M–AVR–09/10
Register Description
ADMUX – ADC Multiplexer Selection Register
Table 25-2.
Example:
ADMUX = 0xFB (ADC3 - ADC2, 10x gain, 2.56V reference, left adjusted result).
Voltage on ADC3 is 300 mV, voltage on ADC2 is 500 mV.
ADCR = 512 × 10 × (300 - 500) / 2560 = -400 = 0x270.
ADCL will thus read 0x00, and ADCH will read 0x9C. Writing zero to ADLAR right adjusts the
result: ADCL = 0x70, ADCH = 0x02.
• Bit 7:6 – REFS1:0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in
changed during a conversion, the change will not go in effect until this conversion is complete
(ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external
reference voltage is being applied to the AREF pin.
Table 25-3.
Note:
Bit
(0x7C)
Read/Write
Initial Value
V
V
V
...
V
V
V
...
V
V
V
ADCn
ADCm
ADCm
ADCm
ADCm
ADCm
ADCm
ADCm
REFS1
ADCm
0
0
1
1
+ 0.999 V
+ 0.998 V
+ 0.001 V
- 0.001 V
- 0.999 V
- V
+ V
1. If 10x or 200x gain is selected, only 2.56 V should be used as Internal Voltage Reference. For
REF
REF
differential conversion, only 1.1V cannot be used as internal voltage reference.
/ GAIN
/ GAIN
Correlation Between Input Voltage and Output Codes
Voltage Reference Selections for ADC
REFS0
REFS1
REF
REF
REF
REF
REF
R/W
7
0
0
1
0
1
/ GAIN
/ GAIN
/ GAIN
/ GAIN
/ GAIN
REFS0
R/W
Voltage Reference Selection
AREF, Internal V
AVCC with external capacitor at AREF pin
Internal 1.1V Voltage Reference with external capacitor at AREF pin
Internal 2.56V Voltage Reference with external capacitor at AREF pin
6
0
ATmega640/1280/1281/2560/2561
ADLAR
R/W
Read Code
0x1FF
0x1FF
0x1FE
...
0x001
0x000
0x3FF
...
0x201
0x200
5
0
REF
MUX4
R/W
turned off
4
0
MUX3
R/W
(1)
3
0
MUX2
R/W
Corresponding Decimal Value
2
0
Table
MUX1
R/W
1
0
25-3. If these bits are
-511
-512
511
511
510
...
-1
...
1
0
MUX0
R/W
0
0
ADMUX
289

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