ATMEGA2560V-8AU Atmel, ATMEGA2560V-8AU Datasheet - Page 203
ATMEGA2560V-8AU
Manufacturer Part Number
ATMEGA2560V-8AU
Description
IC AVR MCU 256K 8MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA640V-8CU.pdf
(38 pages)
2.ATMEGA640V-8CU.pdf
(444 pages)
3.ATMEGA2560V-8AU.pdf
(37 pages)
Specifications of ATMEGA2560V-8AU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
ATMEGA256x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Number Of Timers
6
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
A/d Inputs
16-Channel, 10-Bit
Cpu Speed
8 MIPS
Eeprom Memory
4K Bytes
Input Output
86
Interface
2-Wire/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
100-pin TQFP
Programmable Memory
256K Bytes
Timers
2-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Package
100TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA2560V-8AU
Manufacturer:
Atmel
Quantity:
900
Part Number:
ATMEGA2560V-8AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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20.2.2
2549M–AVR–09/10
SPSR – SPI Status Register
• Bits 1, 0 – SPR1, SPR0: SPI Clock Rate Select 1 and 0
These two bits control the SCK rate of the device configured as a Master. SPR1 and SPR0 have
no effect on the Slave. The relationship between SCK and the Oscillator Clock frequency f
shown in
Table 20-5.
• Bit 7 – SPIF: SPI Interrupt Flag
When a serial transfer is complete, the SPIF Flag is set. An interrupt is generated if SPIE in
SPCR is set and global interrupts are enabled. If SS is an input and is driven low when the SPI is
in Master mode, this will also set the SPIF Flag. SPIF is cleared by hardware when executing the
corresponding interrupt handling vector. Alternatively, the SPIF bit is cleared by first reading the
SPI Status Register with SPIF set, then accessing the SPI Data Register (SPDR).
• Bit 6 – WCOL: Write COLlision Flag
The WCOL bit is set if the SPI Data Register (SPDR) is written during a data transfer. The
WCOL bit (and the SPIF bit) are cleared by first reading the SPI Status Register with WCOL set,
and then accessing the SPI Data Register.
• Bit 5:1 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bit 0 – SPI2X: Double SPI Speed Bit
When this bit is written logic one the SPI speed (SCK Frequency) will be doubled when the SPI
is in Master mode (see
clock periods. When the SPI is configured as Slave, the SPI is only guaranteed to work at f
or lower.
The SPI interface on the ATmega640/1280/1281/2560/2561 is also used for program memory
and EEPROM downloading or uploading. See
gramming and verification.
Bit
0x2D (0x4D)
Read/Write
Initial Value
SPI2X
0
0
0
0
1
1
1
1
Table
Relationship Between SCK and the Oscillator Frequency
20-5.
SPIF
7
R
0
Table
WCOL
SPR1
6
R
0
0
0
1
1
0
0
1
1
20-5). This means that the minimum SCK period will be two CPU
ATmega640/1280/1281/2560/2561
R
5
–
0
SPR0
R
4
–
0
0
1
0
1
0
1
0
1
“Serial Downloading” on page 349
R
3
–
0
R
2
–
0
SCK Frequency
R
1
–
0
f
f
f
osc
f
f
f
osc
osc
f
f
osc
osc
osc
osc
osc
/
/
/
/
/
128
/
/
/
16
64
32
64
4
2
8
SPI2X
R/W
0
0
for serial pro-
SPSR
osc
osc
203
/4
is
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