ATMEGA2560V-8AU Atmel, ATMEGA2560V-8AU Datasheet - Page 234

• Manufacturer Part Number: ATMEGA2560V-8AU
• Description: IC AVR MCU 256K 8MHZ 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA2560V-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• A/d Inputs: 16-Channel, 10-Bit
• Cpu Speed: 8 MIPS
• Eeprom Memory: 4K Bytes
• Input Output: 86
• Interface: 2-Wire/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 100-pin TQFP
• Programmable Memory: 256K Bytes
• Timers: 2-8-bit, 4-16-bit
• Voltage, Range: 1.8-5.5 V
• Package: 100TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.4
22.4.1
2549M–AVR–09/10
Frame Formats
USART MSPIM Initialization
Figure 22-1. UCPHAn and UCPOLn data transfer timing diagrams.
A serial frame for the MSPIM is defined to be one character of 8 data bits. The USART in MSPIM
mode has two valid frame formats:
•
•
A frame starts with the least or most significant data bit. Then the next data bits, up to a total of
eight, are succeeding, ending with the most or least significant bit accordingly. When a complete
frame is transmitted, a new frame can directly follow it, or the communication line can be set to
an idle (high) state.
The UDORDn bit in UCSRnC sets the frame format used by the USART in MSPIM mode. The
Receiver and Transmitter use the same setting. Note that changing the setting of any of these
bits will corrupt all ongoing communication for both the Receiver and Transmitter.
16-bit data transfer can be achieved by writing two data bytes to UDRn. A UART transmit com-
plete interrupt will then signal that the 16-bit value has been shifted out.
The USART in MSPIM mode has to be initialized before any communication can take place. The
initialization process normally consists of setting the baud rate, setting master mode of operation
(by setting DDR_XCKn to one), setting frame format and enabling the Transmitter and the
Receiver. Only the transmitter can operate independently. For interrupt driven USART opera-
tion, the Global Interrupt Flag should be cleared (and thus interrupts globally disabled) when
doing the initialization.
Note:
Before doing a re-initialization with changed baud rate, data mode, or frame format, be sure that
there is no ongoing transmissions during the period the registers are changed. The TXCn Flag
can be used to check that the Transmitter has completed all transfers, and the RXCn Flag can
be used to check that there are no unread data in the receive buffer. Note that the TXCn Flag
must be cleared before each transmission (before UDRn is written) if it is used for this purpose.
8-bit data with MSB first.
8-bit data with LSB first.
Data setup (TXD)
Data sample (RXD)
Data setup (TXD)
XCK
XCK
Data sample (RXD)
To ensure immediate initialization of the XCKn output the baud-rate register (UBRRn) must be
zero at the time the transmitter is enabled. Contrary to the normal mode USART operation the
UBRRn must then be written to the desired value after the transmitter is enabled, but before the
first transmission is started. Setting UBRRn to zero before enabling the transmitter is not neces-
sary if the initialization is done immediately after a reset since UBRRn is reset to zero.
UCPOL=0
ATmega640/1280/1281/2560/2561
Data setup (TXD)
Data sample (RXD)
Data setup (TXD)
Data sample (RXD)
XCK
XCK
UCPOL=1
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