ATMEGA2560V-8AU Atmel, ATMEGA2560V-8AU Datasheet - Page 187

• Manufacturer Part Number: ATMEGA2560V-8AU
• Description: IC AVR MCU 256K 8MHZ 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA2560V-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• A/d Inputs: 16-Channel, 10-Bit
• Cpu Speed: 8 MIPS
• Eeprom Memory: 4K Bytes
• Input Output: 86
• Interface: 2-Wire/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 100-pin TQFP
• Programmable Memory: 256K Bytes
• Timers: 2-8-bit, 4-16-bit
• Voltage, Range: 1.8-5.5 V
• Package: 100TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.10 Register Description
19.10.1
2549M–AVR–09/10
TCCR2A –Timer/Counter Control Register A
• Bits 7:6 – COM2A1:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC2A) behavior. If one or both of the COM2A1:0
bits are set, the OC2A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2A pin
must be set in order to enable the output driver.
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 19-2.
Table 19-3
mode.
Table 19-3.
Note:
Table 19-4 on page 188
to phase correct PWM mode.
Bit
(0xB0)
Read/Write
Initial Value
COM2A1
COM2A1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 178
shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast PWM
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
COM2A1
R/W
COM2A0
COM2A0
7
0
for more details.
0
1
0
1
0
1
0
1
Table 19-2
COM2A0
shows the COM2A1:0 bit functionality when the WGM22:0 bits are set
R/W
6
0
ATmega640/1280/1281/2560/2561
shows the COM2A1:0 bit functionality when the WGM22:0 bits
COM2B1
R/W
WGM22 = 0: Normal Port Operation, OC2A Disconnected.
5
0
Clear OC2A on Compare Match, set OC2A at BOTTOM
Set OC2A on Compare Match, clear OC2A at BOTTOM
WGM22 = 1: Toggle OC2A on Compare Match.
Normal port operation, OC2A disconnected.
Normal port operation, OC2A disconnected.
COM2B0
R/W
4
0
Toggle OC2A on Compare Match.
Clear OC2A on Compare Match.
Set OC2A on Compare Match.
(non-inverting mode).
(inverting mode).
R
3
–
0
(1)
Description
Description
R
2
0
–
WGM21
R/W
1
0
“Fast PWM Mode” on
WGM20
R/W
0
0
TCCR2A
187