ATMEGA128A-AU Atmel, ATMEGA128A-AU Datasheet - Page 319

MCU 8BIT 128K ISP FLASH 64-TQFP

ATMEGA128A-AU

Manufacturer Part Number
ATMEGA128A-AU
Description
MCU 8BIT 128K ISP FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4784435

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26.9.22
26.9.23
26.9.24
26.9.25
8151H–AVR–02/11
Programming the Lock Bits
Reading the Fuses and Lock Bits
Reading the Signature Bytes
Reading the Calibration Byte
3. Load data byte using programming instructions 6b. A bit value of “0” will program the
4. Write Extended Fuse byte using programming instruction 6c.
5. Poll for Fuse write complete using programming instruction 6d, or wait for t
6. Load data byte using programming instructions 6e. A bit value of “0” will program the
7. Write Fuse high byte using programming instruction 6f.
8. Poll for Fuse write complete using programming instruction 6g, or wait for t
9. Load data byte using programming instructions 6h. A “0” will program the fuse, a “1” will
10. Write Fuse low byte using programming instruction 6i.
11. Poll for Fuse write complete using programming instruction 6j, or wait for t
1. Enter JTAG instruction PROG_COMMANDS.
2. Enable Lock bit write using programming instruction 7a.
3. Load data using programming instructions 7b. A bit value of “0” will program the corre-
4. Write Lock bits using programming instruction 7c.
5. Poll for Lock bit write complete using programming instruction 7d, or wait for t
1. Enter JTAG instruction PROG_COMMANDS.
2. Enable Fuse/Lock bit read using programming instruction 8a.
3. To read all Fuses and Lock bits, use programming instruction 8f.
1. Enter JTAG instruction PROG_COMMANDS.
2. Enable Signature byte read using programming instruction 9a.
3. Load address $00 using programming instruction 9b.
4. Read first signature byte using programming instruction 9c.
5. Repeat steps 3 and 4 with address $01 and address $02 to read the second and third
1. Enter JTAG instruction PROG_COMMANDS.
2. Enable Calibration byte read using programming instruction 10a.
3. Load address $00 using programming instruction 10b.
4. Read the calibration byte using programming instruction 10c.
corresponding fuse, a “1” will unprogram the fuse.
Table Note: on page
corresponding fuse, a “1” will unprogram the fuse.
Table Note: on page
unprogram the fuse.
Table Note: on page
sponding lock bit, a “1” will leave the lock bit unchanged.
to
To only read Extended Fuse byte, use programming instruction 8b.
To only read Fuse high byte, use programming instruction 8c.
To only read Fuse low byte, use programming instruction 8d.
To only read Lock bits, use programming instruction 8e.
signature bytes, respectively.
Table Note: on page
327).
327).
327).
327).
ATmega128A
WLRH
WLRH
WLRH
WLRH
(refer to
(refer to
(refer to
(refer
319

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